Patents by Inventor Takuro Asazu

Takuro Asazu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7320932
    Abstract: A semiconductor device of the present invention is furnished with (a) a first protection film, formed on a substrate, having an opening section on an electrode pad, (b) a protrusion electrode, connected on the electrode pad at the opening section, whose peripheral portion is formed to overlap the first protection film, (c) a second protection film, formed to cover at least a gap at a boundary portion of the first protection film and the protrusion electrode, having an opening on a top area of the protrusion electrode except a portion around the boundary portion of the first protection film and the protrusion electrode, and (d) a coating layer formed to cover a surface of the protrusion electrode at the opening of the second protection film. With this arrangement, it is possible to provide a semiconductor device wherein the protrusion electrode is formed with an electroless plating method, capable of preventing the lowering of the adhesion strength of the protrusion electrode to the electrode pad.
    Type: Grant
    Filed: March 20, 2006
    Date of Patent: January 22, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shinji Yamaguchi, Takuro Asazu, Atsushi Ono
  • Publication number: 20060157850
    Abstract: A semiconductor device of the present invention is furnished with (a) a first protection film, formed on a substrate, having an opening section on an electrode pad, (b) a protrusion electrode, connected on the electrode pad at the opening section, whose peripheral portion is formed to overlap the first protection film, (c) a second protection film, formed to cover at least a gap at a boundary portion of the first protection film and the protrusion electrode, having an opening on a top area of the protrusion electrode except a portion around the boundary portion of the first protection film and the protrusion electrode, and (d) a coating layer formed to cover a surface of the protrusion electrode at the opening of the second protection film. With this arrangement, it is possible to provide a semiconductor device wherein the protrusion electrode is formed with an electroless plating method, capable of preventing the lowering of the adhesion strength of the protrusion electrode to the electrode pad.
    Type: Application
    Filed: March 20, 2006
    Publication date: July 20, 2006
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Shinji Yamaguchi, Takuro Asazu, Atsushi Ono
  • Patent number: 7045894
    Abstract: A semiconductor device of the present invention is furnished with (a) a first protection film, formed on a substrate, having an opening section on an electrode pad, (b) a protrusion electrode, connected on the electrode pad at the opening section, whose peripheral portion is formed to overlap the first protection film, (c) a second protection film, formed to cover at least a gap at a boundary portion of the first protection film and the protrusion electrode, having an opening on a top area of the protrusion electrode except a portion around the boundary portion of the first protection film and the protrusion electrode, and (d) a coating layer formed to cover a surface of the protrusion electrode at the opening of the second protection film. With this arrangement, it is possible to provide a semiconductor device wherein the protrusion electrode is formed with an electroless plating method, capable of preventing the lowering of the adhesion strength of the protrusion electrode to the electrode pad.
    Type: Grant
    Filed: December 24, 2002
    Date of Patent: May 16, 2006
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shinji Yamaguchi, Takuro Asazu, Atsushi Ono
  • Patent number: 6908311
    Abstract: A first protection film (3) and a second protection film (4) are formed on an electrode pad (2). Bumps (5) are formed at sites where the deposited first and second protection films (3), (4) are both removed. The openings (3a) where the lower, first protection film (3) is removed are larger than the openings (4a) where the upper, second protection film (4) is removed, so that the upper, second protection film (4) has an overhanging structure. The bottom periphery of the bump (5) is formed to extend under the second protection film (4).
    Type: Grant
    Filed: April 25, 2003
    Date of Patent: June 21, 2005
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Atsushi Ono, Takuro Asazu, Shinji Yamaguchi
  • Patent number: 6747351
    Abstract: A defect-free film is formed on a surface of a protrusive electrode. An immersion Au film is formed on the surface of the protrusive electrode, after a gap which an immersion Au plating liquid can enter evenly is formed between a protrusive electrode made of Ni or a Ni alloy on an electrode pad made of Al or mainly made of Al and a protective coat by etching.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: June 8, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shinji Yamaguchi, Takuro Asazu, Atsushi Ono
  • Publication number: 20030203661
    Abstract: A first protection film (3) and a second protection film (4) are formed on an electrode pad (2). Bumps (5) are formed at sites where the deposited first and second protection films (3), (4) are both removed. The openings (3a) where the lower, first protection film (3) is removed are larger than the openings (4a) where the upper, second protection film (4) is removed, so that the upper, second protection film (4) has an overhanging structure. The bottom periphery of the bump (5) is formed to extend under the second protection film (4).
    Type: Application
    Filed: April 25, 2003
    Publication date: October 30, 2003
    Inventors: Atsushi Ono, Takuro Asazu, Shinji Yamaguchi
  • Publication number: 20030116865
    Abstract: A semiconductor device of the present invention is furnished with (a) a first protection film, formed on a substrate, having an opening section on an electrode pad, (b) a protrusion electrode, connected on the electrode pad at the opening section, whose peripheral portion is formed to overlap the first protection film, (c) a second protection film, formed to cover at least a gap at a boundary portion of the first protection film and the protrusion electrode, having an opening on a top area of the protrusion electrode except a portion around the boundary portion of the first protection film and the protrusion electrode, and (d) a coating layer formed to cover a surface of the protrusion electrode at the opening of the second protection film. With this arrangement, it is possible to provide a semiconductor device wherein the protrusion electrode is formed with an electroless plating method, capable of preventing the lowering of the adhesion strength of the protrusion electrode to the electrode pad.
    Type: Application
    Filed: December 24, 2002
    Publication date: June 26, 2003
    Inventors: Shinji Yamaguchi, Takuro Asazu, Atsushi Ono
  • Patent number: 6518162
    Abstract: The present invention includes a step of forming an Ni bump by non-electrolytic plating in an opening of a protecting film having an insulating property formed on an electrode pad which is provided on a semiconductor substrate, and a step of removing a plating solution residue remaining in a gap between the Ni bump and the protecting film. The plating solution residue is removed by cleaning in a cleaning solution containing hydrogen peroxide, or by applying an ultrasonic wave in a cleaning solution such as pure water.
    Type: Grant
    Filed: August 24, 2001
    Date of Patent: February 11, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Atsushi Ono, Takuro Asazu, Shinji Yamaguchi
  • Publication number: 20020081843
    Abstract: A defect-free film is formed on a surface of a protrusive electrode. An immersion Au film is formed on the surface of the protrusive electrode, after a gap which an immersion Au plating liquid can enter evenly is formed between a protrusive electrode made of Ni or a Ni alloy on an electrode pad made of Al or mainly made of Al and a protective coat by etching.
    Type: Application
    Filed: October 5, 2001
    Publication date: June 27, 2002
    Inventors: Shinji Yamaguchi, Takuro Asazu, Atsushi Ono
  • Publication number: 20020058412
    Abstract: The present invention includes a step of forming an Ni bump by non-electrolytic plating in an opening of a protecting film having an insulating property formed on an electrode pad which is provided on a semiconductor substrate, and a step of removing a plating solution residue remaining in a gap between the Ni bump and the protecting film. The plating solution residue is removed by cleaning in a cleaning solution containing hydrogen peroxide, or by applying an ultrasonic wave in a cleaning solution such as pure water.
    Type: Application
    Filed: August 24, 2001
    Publication date: May 16, 2002
    Inventors: Atsushi Ono, Takuro Asazu, Shinji Yamaguchi
  • Publication number: 20010017412
    Abstract: Formed on the semiconductor chip surface are electrode pads, on which electroless Ni plated bumps are formed. The electroless Ni plated bumps are arranged in at least two rows in parallel with the two sides of the semiconductor chip, opposing each other. Each electroless Ni bump is 5 &mgr;m or more in height and the surface is coated with Au plating as a metal film. The surface of the conductor leads is coated with Sn plating. The conductor leads and bumps are heated and pressed by a bonding tool to crate Au/Sn eutectic alloy junctions.
    Type: Application
    Filed: December 5, 2000
    Publication date: August 30, 2001
    Inventors: Takuro Asazu, Atsushi Ono, Shinji Yamaguchi
  • Patent number: 6049121
    Abstract: A tape carrier package includes a semiconductor chip including a first row of electrode bumps formed on a surface of a semiconductor chip and a second row of electrode bumps formed on the surface of the semiconductor chip parallel to the first row. The tape carrier package also includes an insulating film, at least a portion of the insulating film being formed on the semiconductor chip, a conductor pattern including a first lead section formed on the insulating film and connectable to an external device and a second lead section extending from the first lead section so as to electrically connect to the first and second rows of electrode bumps. At least a part of the first lead section is positioned on the semiconductor chip. A sealing resin is provided for sealing at least a junction between the first and second rows of electrode bumps and the second lead section.
    Type: Grant
    Filed: April 24, 1997
    Date of Patent: April 11, 2000
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kenji Toyosawa, Takuro Asazu, Naoyuki Tajima