Abstract: Disclosed is a two-dimensionally arrayed solid-state imaging device for a television camera having a photodiode array arranged at a photo-sensing section and a readout horizontal register constructed by a charge transfer device (CTD) such as a BCD, CCD or BBD. An inverter circuit is provided for each of the vertical signal lines. An input of the inverter circuit is connected to a vertical signal line drain of at least one transfer transistor arranged between the vertical signal line and the CTD, and an output of the inverter circuit is connected to a gate of the transfer transistor. Transfer efficiency is improved by the insertion of the inverter circuit and fixed pattern noise is substantially reduced by supplying bias currents.

Abstract: A method and apparatus for increasing the sensitivity of a charge priming type solid state camera having means for sweeping out undesired excess charges generated by a vertical smear from vertical signal lines. When the scene illumination is higher than an appropriate value, the sweep out of the undesired excess charges is executed within each horizontal blanking period in order to reduce the vertical smear. When the scene illumination becomes lower than the appropriate value, the sweep out thereof is stopped in order to increase the sensitivity. Alternatively, when the scene illumination is lower than the appropriate value but the quantity of the vertical smear is larger than a fixed value, the sweep out thereof is executed within each horizontal blanking period in order to suppress vertical smear which is at an unacceptably high level even though the illumination level is relatively low.

Abstract: Disclosed is a solid-state imaging device wherein optical information of a number of photo-electric conversion elements arranged in a matrix is read into vertical signal lines by a vertical shift register and then the optical information on the vertical signal lines is horizontally scanned by a horizontal register of a charge transfer device. Bias charge storage means and quasi-signal sweep-out drains are disposed between the horizontal register and the vertical signal lines, and a bias charge input means is arranged in the horizontal register. In order to ensure high efficiency in transferring signals between the vertical lines to the storage means, the sweep-out drains and the charge transfer device, it is arranged for bias charges to be provided at each stage of transfer. Thus, bias charges supplied from the storage means are used to transfer charges from the vertical lines to the storage means.

Abstract: A signal processing circuit for use in a solid-state camera comprising a sensor for deriving an electrical signal from the camera, a preamplifier for amplifying the output of the sensor and an integrator for integrating the output of the preamplifier. A specific circuit arrangement is provided for the preamplifier to narrow the bandwidth of the preamplifier, so that an abnormal increase of noise in the electrical signal is effectively suppressed.

Abstract: A picture-in-picture television receiver is disclosed in which a television picture to be inset is compressed at a compression rate of 1/n and inset as a small-picture in part of a main television picture or large picture, and a single field memory for small-picture reproduction is provided therein in or from which a video signal can be randomly read and written line by line as a unit. In the single field memory is stored the small-picture video signal line by line by the application of a writing clock in which case the time taken in the writing is less than 1/(n+1) of a horizontal period. Then, from the memory is read the stored small-picture information by the application of a reading clock of n times the frequency of the writing clock during the time that writing is not performed, and supplied to be inset in the main television picture.