Abstract: To prevent a vertical stripe pattern on a display screen of an image display device and an image display panel of narrow pulse driving, there is provided an image display panel and image display device comprising a pixel portion arranged with pixels in matrix, a drive circuit connected respectively to each data line shared by pixels in each column of the pixel portion for controlling supplying of a video signal to be input to the data line based on a plurality of clocks to be input, a plurality of input pads for inputting a plurality of clocks, and a clock input circuit, wherein resistance of wiring from the plurality of input pads to the clock input circuits is made to be approximately the same between the plurality of clocks.

Abstract: A display apparatus and a method for driving the display apparatus that are capable of suppressing image quality degradation resulting from delay in sampling pulses or from waveform rounding thereof and image quality degradation caused by coupling between the signal line and the common line and that between the signal line and the scan line even when the simultaneous sampling number is increased. The start pulse HST has a pulse width that includes a plurality of pulse widths of the clock pulses HCK and HCKX, for example, two pulse widths. The clock pulses DCK have four phases. Large margins ?1 and ?2 in the phase relationship between each of the clock pulses DCK1 to DCK4 and each of transfer pulses used for extracting the clock pulses DCK1 to DCK4 are assured.

Abstract: An image display device and an image display panel having a high accuracy of adjusting the sample timing of a video signal and capable of preventing a constant wasteful power consumption and comprising a timing detection circuit for generating a timing detection signal changing from a first level to a second level every time a switch circuit connected to each data line shared by pixels in each column sends a video signal, and the timing detection circuit including at an output terminal of a timing detection signal a means (for example, PMOS) for closing a current path on the first level side and a means (for example, NMOS) for opening a current path on the second level side respectively in synchronization with a video signal sending operation of the switch circuit.

Abstract: A display device and a projection type display device, able to realize an image display having a high precision regardless of the scanning direction of operation without a change of a phase of an output potential change, receiving a horizontal start pulse and a switch signal at a first scanning operation to sample a clock different from a clock sampled by a first shift stage of a horizontal scanner by a selector portion of a monitor circuit, setting a potential of a pulled up monitor line at a ground potential in response to this sample-and-hold pulse, receiving the horizontal start pulse and the switch signal to sample a clock different from the clock sampled by a fourth shift stage of the horizontal scanner by the selector portion of the monitor circuit at the second scanning operation, and setting the potential of the pulled up monitor line at the ground potential in response to this sample-and-hold pulse.

Abstract: A display apparatus and a method for driving the display apparatus that are capable of suppressing image quality degradation resulting from delay in sampling pulses or from waveform rounding thereof and image quality degradation caused by coupling between the signal line and the common line and that between the signal line and the scan line even when the simultaneous sampling number is increased. The start pulse HST has a pulse width that includes a plurality of pulse widths of the clock pulses HCK and HCKX, for example, two pulse widths. The clock pulses DCK have four phases. Large margins ?1 and ?2 in the phase relationship between each of the clock pulses DCK1 to DCK4 and each of transfer pulses used for extracting the clock pulses DCK1 to DCK4 are assured.

Abstract: To prevent a vertical stripe pattern on a display screen of an image display device and an image display panel of narrow pulse driving, there is provided an image display panel and image display device comprising a pixel portion arranged with pixels in matrix, a drive circuit connected respectively to each data line shared by pixels in each column of the pixel portion for controlling supplying of a video signal to be input to the data line based on a plurality of clocks to be input, a plurality of input pads for inputting a plurality of clocks, and a clock input circuit, wherein resistance of wiring from the plurality of input pads to the clock input circuits is made to be approximately the same between the plurality of clocks.

Abstract: A display device and a projection type display device, able to realize an image display having a high precision regardless of the scanning direction of operation without a change of a phase of an output potential change, receiving a horizontal start pulse and a switch signal at a first scanning operation to sample a clock different from a clock sampled by a first shift stage of a horizontal scanner by a selector portion of a monitor circuit, setting a potential of a pulled up monitor line at a ground potential in response to this sample-and-hold pulse, receiving the horizontal start pulse and the switch signal to sample a clock different from the clock sampled by a fourth shift stage of the horizontal scanner by the selector portion of the monitor circuit at the second scanning operation, and setting the potential of the pulled up monitor line at the ground potential in response to this sample-and-hold pulse.

Abstract: An image display device and an image display panel having high accuracy of adjusting sampling timing of a video signal and being capable of preventing a constant wasteful power consumption, comprise a timing detection circuit for generating a timing detection signal changing from a first level to a second level every time a switch circuit connected to each data line shared by pixels in each column sends a video signal, and the timing detection circuit includes at an output terminal of a timing detection signal a means (for example, PMOS) for closing a current path on the first level side and a means (for example NMOS) for opening a current path on the second level side respectively in synchronization with a video signal sending operation of the switch circuit.

Abstract: This invention is directed to an information processing method, an information processing apparatus and a recording medium which are applied to on-line shopping in internet to have ability to realize positive utilization of user to notify, to user, in advance, accumulated point in the case where a series of information according to purchase of goods, etc. are notified.