Abstract: Pixel arrangements in time-of-flight sensors are presented that include sensing elements that establish charges related to incident light, charge storage elements that accumulate integrated charges transferred from the sensing elements, and diffusion nodes configured to establish measurement voltages representative of the integrated charges that are dumped from the charge storage elements. The pixel arrangement includes analog domain output circuitry comprising a measurement capacitance element that stores the measurement voltage, and a reset capacitance element that stores a reset voltage established at the diffusion node during a reset phase performed prior to a measurement phase. The analog domain output circuitry subtracts the stored reset voltage from the stored measurement voltage for processing into a pixel output voltage that at least partially reduces readout voltage uncertainty of the pixel arrangement.

Abstract: Pixel arrangements in time-of-flight sensors or other imaging sensors are presented that include a sensing element configured to accumulate charges related to incident light, and two transfer gates proximate to the sensing element and configured to selectively control transfer of the charges in the pixel arrangement. During an integration phase, a charge storage element for a global shutter stores first charges received from the sensing element based on activation of a first transfer gate and inactivation of a second transfer gate. During a reset phase, a diffusion node receives second charges received from the sensing element based on inactivation of the first transfer gate and activation of the second transfer gate. During a pixel readout phase, the diffusion node receives the first charges received from the charge storage element based on activation of the first transfer gate and activation of the second transfer gate.

Abstract: Pixel arrangements in time-of-flight sensors are presented that include sensing elements that establish charges related to incident light, charge storage elements that accumulate integrated charges transferred from the sensing elements, and diffusion nodes configured to establish measurement voltages representative of the integrated charges that are dumped from the charge storage elements. The pixel arrangement includes analog domain output circuitry comprising a measurement capacitance element that stores the measurement voltage, and a reset capacitance element that stores a reset voltage established at the diffusion node during a reset phase performed prior to a measurement phase. The analog domain output circuitry subtracts the stored reset voltage from the stored measurement voltage for processing into a pixel output voltage that at least partially reduces readout voltage uncertainty of the pixel arrangement.

Abstract: Pixel arrangements in time-of-flight sensors are presented that include sensing elements that establish charges related to incident light, charge storage elements that accumulate integrated charges transferred from the sensing elements, and diffusion nodes configured to establish measurement voltages representative of the integrated charges that are dumped from the charge storage elements. The pixel arrangement includes analog domain output circuitry comprising a measurement capacitance element that stores the measurement voltage, and a reset capacitance element that stores a reset voltage established at the diffusion node during a reset phase performed prior to a measurement phase. The analog domain output circuitry subtracts the stored reset voltage from the stored measurement voltage for processing into a pixel output voltage that at least partially reduces readout voltage uncertainty of the pixel arrangement.

Abstract: A time-of-flight detector includes a semiconductor layer and a light modulation structure. The semiconductor layer is configured to translate light radiation into electrical charge. The light modulation structure is configured to increase a path of interaction of light radiation through the semiconductor layer. In some example implementations, the light modulation structure is configured to deflect at least some light radiation at an increased angle through the semiconductor layer. In some example implementations, the light modulation structure is configured to reflect light radiation more than once through the semiconductor layer.

Abstract: Pixel arrangements in time-of-flight sensors are presented that include sensing elements that establish charges related to incident light, charge storage elements that accumulate integrated charges transferred from the sensing elements, and diffusion nodes configured to establish measurement voltages representative of the integrated charges that are dumped from the charge storage elements. The pixel arrangement includes analog domain output circuitry comprising a measurement capacitance element that stores the measurement voltage, and a reset capacitance element that stores a reset voltage established at the diffusion node during a reset phase performed prior to a measurement phase. The analog domain output circuitry subtracts the stored reset voltage from the stored measurement voltage for processing into a pixel output voltage that at least partially reduces readout voltage uncertainty of the pixel arrangement.

Abstract: Pixel arrangements in time-of-flight sensors or other imaging sensors are presented that include a sensing element configured to accumulate charges related to incident light, and two transfer gates proximate to the sensing element and configured to selectively control transfer of the charges in the pixel arrangement. During an integration phase, a charge storage element for a global shutter stores first charges received from the sensing element based on activation of a first transfer gate and inactivation of a second transfer gate. During a reset phase, a diffusion node receives second charges received from the sensing element based on inactivation of the first transfer gate and activation of the second transfer gate. During a pixel readout phase, the diffusion node receives the first charges received from the charge storage element based on activation of the first transfer gate and activation of the second transfer gate.

Abstract: A CMOS time-of-flight image sensor must be robust to interface traps and fixed charges which may be present due to fabrication and which may cause an undesired induced electric field in the silicon substrate. This undesired induced electrical field is reduced by introducing a hydrogen-enriched dielectric material. Further remedial techniques can include applying ultraviolet light and/or performing a plasma treatment. Another possible approach adds a passivation doping layer at a top of the detector as a shield against the undesired induced electric field. One or more of the above techniques can be used to prevent any unstable behavior of the time-of-flight sensor.

Abstract: A CMOS time-of-flight image sensor must be robust to interface traps and fixed charges which may be present due to fabrication and which may cause an undesired induced electric field in the silicon substrate. This undesired induced electrical field is reduced by introducing a hydrogen-enriched dielectric material. Further remedial techniques can include applying ultraviolet light and/or performing a plasma treatment. Another possible approach adds a passivation doping layer at a top of the detector as a shield against the undesired induced electric field. One or more of the above techniques can be used to prevent any unstable behavior of the time-of-flight sensor.

Abstract: An imager includes an emitter, an array of pixel elements, and driver logic. The emitter releases bursts of light pulses with pauses between bursts. Each element of the array has a finger gate biasable to attract charge to the surface, a reading node to collect the charge, and a transfer gate to admit such charge to the reading node and to deter such charge from being absorbed into the finger gate. The driver logic biases the finger gates with the modulated light pulses such that the finger gates of adjacent first and second elements cycle with unequal phase into and out of a charge-attracting state. To reduce the effects of ambient light on the imager, the driver logic is configured to bias the transfer gates so that the charge is admitted to the reading node only during the bursts and is prevented from reaching the reading node during the pauses.

Abstract: A time-of-flight detector includes a semiconductor layer and a light modulation structure. The semiconductor layer is configured to translate light radiation into electrical charge. The light modulation structure is configured to increase a path of interaction of light radiation through the semiconductor layer. In some example implementations, the light modulation structure is configured to deflect at least some light radiation at an increased angle through the semiconductor layer. In some example implementations, the light modulation structure is configured to reflect light radiation more than once through the semiconductor layer.

Abstract: A CMOS image sensor pixel has an integrated shallow trench isolation structure, resulting in higher optical sensitivity in general, and specifically for long wavelengths (red, near infrared, infrared). The shallow trench isolation structure acts as an optical grating that reflects and diffracts light so that an increased optical energy (photo generation) is observed in the photosensitive semiconductor layer of the pixel. An increase in dark current is avoided by passivating the shallow trench isolation structure with dopant which was implanted within the photosensitive semiconductor layer. Annealing in a standard CMOS process causes the dopant to diffuse toward the shallow trench isolation structure. The pixel can be configured as a time-of-flight sensor. The shallow trench isolation structure acts as a physical barrier for electrical charge motion, resulting in a higher modulation contrast pixel. Further, front side or backside illumination can be used.

Abstract: An imager includes an emitter, an array of pixel elements, and driver logic. The emitter releases bursts of light pulses with pauses between bursts. Each element of the array has a finger gate biasable to attract charge to the surface, a reading node to collect the charge, and a transfer gate to admit such charge to the reading node and to deter such charge from being absorbed into the finger gate. The driver logic biases the finger gates with the modulated light pulses such that the finger gates of adjacent first and second elements cycle with unequal phase into and out of a charge-attracting state. To reduce the effects of ambient light on the imager, the driver logic is configured to bias the transfer gates so that the charge is admitted to the reading node only during the bursts and is prevented from reaching the reading node during the pauses.