Patents by Inventor Tan Leong Seng

Tan Leong Seng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Split dual gate field effect transistor
    Patent number: 8614487
    Abstract: A semiconductor device with at least two gate regions. The device includes a substrate region including a surface, a source region in the substrate region, and a drain region in the substrate region. The drain region and the source region are separate from each other. Additionally, the device includes a first gate region on the surface, a second gate region on the surface, and an insulation region on the surface and between the first gate region and the second gate region. The first gate region and the second gate region are separated by the insulation region. The first gate region is capable of forming a first channel in the substrate region. The first channel is from the source region to the drain region. The second gate region is capable of forming a second channel in the substrate region. The second channel is from the source region to the drain region.
    Type: Grant
    Filed: March 15, 2006
    Date of Patent: December 24, 2013
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Deyuan Xiao, Gary Chen, Tan Leong Seng, Roger Lee
  • Method for making split dual gate field effect transistor
    Patent number: 8093114
    Abstract: A method for making a semiconductor device with at least two gate regions. The method includes providing a substrate region including a surface. Additionally, the method includes forming a source region in the substrate region by at least implanting a first plurality of ions into the substrate region and forming a drain region in the substrate region by at least implanting a second plurality of ions into the substrate region. The drain region and the source region are separate from each other. Moreover, the method includes depositing a gate layer on the surface and forming a first gate region and a second gate region on the surface.
    Type: Grant
    Filed: August 27, 2009
    Date of Patent: January 10, 2012
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Deyuan Xiao, Gary Chen, Tan Leong Seng, Roger Lee
  • Method for Making Split Dual Gate Field Effect Transistor
    Publication number: 20100087040
    Abstract: A method for making a semiconductor device with at least two gate regions. The method includes providing a substrate region including a surface. Additionally, the method includes forming a source region in the substrate region by at least implanting a first plurality of ions into the substrate region and forming a drain region in the substrate region by at least implanting a second plurality of ions into the substrate region. The drain region and the source region are separate from each other. Moreover, the method includes depositing a gate layer on the surface and forming a first gate region and a second gate region on the surface.
    Type: Application
    Filed: August 27, 2009
    Publication date: April 8, 2010
    Applicant: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Deyuan Xiao, Gary Chen, Tan Leong Seng, Roger Lee
  • Method for making split dual gate field effect transistor
    Patent number: 7582517
    Abstract: A method for making a semiconductor device with at least two gate regions. The method includes providing a substrate region including a surface. Additionally, the method includes forming a source region in the substrate region by at least implanting a first plurality of ions into the substrate region and forming a drain region in the substrate region by at least implanting a second plurality of ions into the substrate region. The drain region and the source region are separate from each other. Moreover, the method includes depositing a gate layer on the surface and forming a first gate region and a second gate region on the surface.
    Type: Grant
    Filed: March 15, 2006
    Date of Patent: September 1, 2009
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Deyuan Xiao, Gary Chen, Tan Leong Seng, Roger Lee