Patents by Inventor Tao Sheng

Tao Sheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240150316
    Abstract: Compounds, compositions and methods are provided for modulating the activity of EP2 and EP4 receptors, and for the treatment, prevention and amelioration of one or more symptoms of diseases or disorders related to the activity of EP2 and EP4 receptors. In certain embodiments, the compounds are antagonists of both the EP2 and EP4 receptors.
    Type: Application
    Filed: September 14, 2023
    Publication date: May 9, 2024
    Inventors: Yalda BRAVO, Austin Chih-Yu CHEN, Jinyue DING, Robert GOMEZ, Heather LAM, Joe Fred NAGAMIZO, Renata Marcella OBALLA, David Andrew POWELL, Tao SHENG
  • Patent number: 11979144
    Abstract: The present invention provides a driving circuit for a driving hip. The driving circuit includes a bootstrap circuit with a bootstrap voltage terminal. A power terminal of a high-voltage driving circuit is connected to the bootstrap voltage terminal, and a ground terminal of the high-voltage driving circuit is connected to a regulating terminal. A high-side drive circuit includes a high-side pull-up circuit and a high-side pull-down circuit. The driving circuit includes: an auxiliary power terminal; a mirror current source an input terminal of the mirror current source being connected to the bootstrap voltage terminal; a first MOS transistor; a second MOS transistor an equivalent diode component, an output terminal of the second MOS transistor being connected to the regulating terminal through the equivalent diode component; and an equivalent resistance component, the gate of the first MOS transistor being connected to the regulating terminal through the equivalent resistance component.
    Type: Grant
    Filed: November 12, 2020
    Date of Patent: May 7, 2024
    Assignee: SUZHOU NOVOSENSE MICROELECTRONICS CO., LTD.
    Inventors: Tao Lin, Shaoyu Ma, Yun Sheng
  • Publication number: 20240140168
    Abstract: A system for regulating an environment within an operator cabin of a machine via a heating, ventilation, and air conditioning (HVAC) system includes a first sensor that generates a first signal of an amount of air pressure within the operator cabin, a second sensor that generates a second signal of an amount of carbon dioxide within the operator cabin, an air filtration element to direct pre-cleaned air into the operator cabin, an inlet valve disposed between the air filtration element and the HVAC system for controlling a flowrate of the pre-cleaned air to the HVAC system, and a controller. The controller actuates dynamic auto-control of the inlet valve to direct an optimally varying flowrate of the pre-cleaned air from the air filtration element to the HVAC system via the inlet valve to maximize a service life of the air filtration element.
    Type: Application
    Filed: October 27, 2022
    Publication date: May 2, 2024
    Applicant: Caterpillar Inc.
    Inventors: Elakhya Nedumaran, Liang Fan, Jiawei Sheng, Tao Meng, Bahman Gozloo, Dennis Lee Kroeger, Weixiu Wang, YOSABATH SAMRAJ M., Thanjavur Nagarajan Sriraam
  • Publication number: 20240142223
    Abstract: In one implementation, a method of monitoring film thickness on a substrate, comprises: generating light from a light source; collimating the light from the light source to form a collimated beam; reflecting the collimated beam off of a surface to be measured to produce a reflected beam; splitting the reflected beam with a dichroic mirror, wherein the reflected beam splits into a first beam and a second beam; receiving, by a pyrometer, the first beam from the dichroic mirror; receiving, by a spectrometer, the second beam from the dichroic mirror; and analyzing data derived from the pyrometer and the spectrometer to determine one or more characteristics of the surface to be measured.
    Type: Application
    Filed: April 28, 2023
    Publication date: May 2, 2024
    Inventors: Khokan C. PAUL, Zhepeng CONG, Tao SHENG, Edward W. BUDIARTO, Todd EGAN
  • Publication number: 20240141487
    Abstract: Embodiments disclosed herein generally provide improved control of gas flow in processing chambers. In at least one embodiment, a disk and liner assembly includes a quartz disk having an outer diameter, a plurality of holes or slots formed in the quartz disk, and a quartz ring having an inner diameter less than the outer diameter of the quartz disk.
    Type: Application
    Filed: October 27, 2022
    Publication date: May 2, 2024
    Inventors: Zhepeng CONG, Ashur J. ATANOS, Khokan C. PAUL, Nimrod SMITH, Tao SHENG, Vinh TRAN
  • Publication number: 20240141551
    Abstract: Embodiments of the present disclosure generally relate to apparatus and systems for in-situ film growth rate monitoring and include a system to monitor film growth on a substrate including a light source, a collimator, a dichroic mirror, and a filter all along a propagation path and in optical communication along the propagation path. The propagation path splits into a first sub-path and second sub-path at the dichroic mirror. The first sub-path is directed to a pyrometer, and the second sub-path is directed to a spectrometer.
    Type: Application
    Filed: April 28, 2023
    Publication date: May 2, 2024
    Inventors: Khokan C. PAUL, Zhepeng CONG, Tao SHENG, Nimrod SMITH
  • Publication number: 20240145273
    Abstract: The present disclosure relates to methods, systems, and apparatus for monitoring temperature at multiple sites within a substrate processing chamber. A system for processing substrates includes: a process chamber comprising a processing volume, a first window at a first perimeter of the processing volume, a substrate support within the processing volume; and a first multi-wavelength pyrometer configured to measure: a first temperature at a first site proximal the first window, and a second temperature at a second site proximal the substrate support.
    Type: Application
    Filed: October 17, 2023
    Publication date: May 2, 2024
    Inventors: Zhepeng CONG, Tao SHENG, Ashur J. ATANOS, Nimrod SMITH, Vinh N. TRAN, Khokan C. PAUL
  • Publication number: 20240136140
    Abstract: Embodiments of the present disclosure relates to methods, systems, and apparatus for monitoring radiation output of lamps of processing chambers. In some embodiments, a system contains a plurality of lamps coupled to a chamber, and one or more radiation sensors. Each lamp is identified with one or more zones, the radiation sensors are coupled to the chamber, where each radiation sensor is proximal at least one lamp. A controller contains instructions that, when executed, cause: the radiation sensors to convey, to the controller, information associated with radiation emitted by the lamps; the controller to analyze the information, the analyzing including: for each zone: determining a function of radiation over time; and monitoring the function for a condition associated with lamp aging; and the controller to, based on the analyzing the information, perform at least one of the following: vary input power delivered to the lamps; and generate an alert.
    Type: Application
    Filed: October 16, 2023
    Publication date: April 25, 2024
    Inventors: Zhepeng CONG, Ashur J. ATANOS, Khokan C. PAUL, Tao SHENG
  • Publication number: 20240136316
    Abstract: A semiconductor package includes a conductive pillar and a solder. The conductive pillar has a first sidewall and a second sidewall opposite to the first sidewall, wherein a height of the first sidewall is greater than a height of the second sidewall. The solder is disposed on and in direct contact with the conductive pillar, wherein the solder is hanging over the first sidewall and the second sidewall of conductive pillar.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chiang-Jui Chu, Ching-Wen Hsiao, Hao-Chun Liu, Ming-Da Cheng, Young-Hwa Wu, Tao-Sheng Chang
  • Publication number: 20240119283
    Abstract: A method of performing automatic tuning on a deep learning model includes: utilizing an instruction-based learned cost model to estimate a first type of operational performance metrics based on a tuned configuration of layer fusion and tensor tiling; utilizing statistical data gathered during a compilation process of the deep learning model to determine a second type of operational performance metrics based on the tuned configuration of layer fusion and tensor tiling; performing an auto-tuning process to obtain a plurality of optimal configurations based on the first type of operational performance metrics and the second type of operational performance metrics; and configure the deep learning model according to one of the plurality of optimal configurations.
    Type: Application
    Filed: October 6, 2023
    Publication date: April 11, 2024
    Applicant: MEDIATEK INC.
    Inventors: Jui-Yang Hsu, Cheng-Sheng Chan, Jen-Chieh Tsai, Huai-Ting Li, Bo-Yu Kuo, Yen-Hao Chen, Kai-Ling Huang, Ping-Yuan Tseng, Tao Tu, Sheng-Je Hung
  • Publication number: 20240120197
    Abstract: The present disclosure generally relates to process chambers for semiconductor processing. In one embodiment, a growth monitor for substrate processing is provided. The growth monitor includes a sensor holder and a crystal disposed in the sensor holder having a front side and a back side. An opening is formed in the sensor holder exposing a front side of the crystal. A gas inlet is disposed through the sensor holder to a plenum formed by the back side of the crystal and the sensor holder. A gas outlet is fluidly coupled to the plenum.
    Type: Application
    Filed: December 13, 2023
    Publication date: April 11, 2024
    Inventors: Zhepeng CONG, Mostafa BAGHBANZADEH, Tao SHENG, Enle CHOO
  • Patent number: 11956939
    Abstract: A memory device includes a first field effect transistor (FET) stack on a first bottom source/drain region, which includes a first vertical transport field effect transistor (VTFET) device between a second VTFET device and the first source/drain region, and a second FET stack on a second bottom source/drain region, which includes a third VTFET device between a fourth VTFET device and the bottom source/drain region. The memory device includes a third FET stack on a third bottom source/drain region, which includes a fifth VTFET between a sixth VTFET and the third source/drain region, which is laterally adjacent to the first and second source/drain regions. The memory device includes a first electrical connection interconnecting a gate structure of the third VTFET with a gate structure of the fifth VTFET, and a second electrical connection interconnecting a gate structure of the second VTFET with a gate structure of the sixth VTFET.
    Type: Grant
    Filed: March 14, 2023
    Date of Patent: April 9, 2024
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tsung-Sheng Kang, Ardasheir Rahman, Tao Li, Albert M. Young
  • Publication number: 20240114533
    Abstract: A method for sidelink communication is provided. The method is applied to a first UE in a sidelink communication to transmit signals to a second UE which is a peer receiving (peer-Rx) UE of the first UE. The method includes the following steps: maintaining a counter to record how many periodic reservations remain to be used for sidelink signal transmission, wherein the periodic reservations are associated with a reservation period and each periodic reservation is associated with at least one sidelink resource; determining whether a resource re-selection condition is met before the counter counts to 0, wherein the resource re-selection condition is associated with status of receiving responses corresponding to a subset of the sidelink resources; and reselectting at least one new sidelink resource for next periodic reservations when the resource re-selection condition is met.
    Type: Application
    Filed: January 14, 2022
    Publication date: April 4, 2024
    Inventors: Lung-Sheng TSAI, Tao CHEN
  • Patent number: 11948818
    Abstract: A method and apparatus for calibrating a temperature within a processing chamber are described. The method includes determining an etch rate of a layer within the processing chamber. The processing chamber is a deposition chamber configured for use during semiconductor manufacturing. The etch rate is utilized to determine a temperature within the processing chamber. The temperature within the processing chamber is then subsequently compared to a calibrated temperature to determine a temperature offset. The etch rate is determined using any one of a pyrometer, a reflectometer, a camera, or a mass sensor.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: April 2, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Zhepeng Cong, Tao Sheng, Vinh N. Tran
  • Patent number: 11942424
    Abstract: An interconnect structure and a method of forming the interconnect structure are provided. The interconnect structure includes one or more metal lines in direct contact with a top surface of one or more devices and one or more vias in direct contact with top surfaces of the one or more metal lines. The interconnect structure also includes one or more dielectric pillars in direct contact with the top surface of the one or more devices. A height of a top surface of the one or more dielectric pillars above the one or more devices is equal to a height of a top surface of the one or more vias above the one or more devices.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: March 26, 2024
    Assignee: International Business Machines Corporation
    Inventors: Tao Li, Ruilong Xie, Tsung-Sheng Kang, Chih-Chao Yang
  • Publication number: 20240096978
    Abstract: A CMOS apparatus includes an n-doped field effect transistor (nFET); and a p-doped field effect transistor (pFET), each of which has a source structure and a drain structure. A common backside drain contact, which is disposed at the backside surface of the nFET and the pFET, electrically connects the nFET drain structure and the pFET drain structure to a backside interconnect layer.
    Type: Application
    Filed: September 15, 2022
    Publication date: March 21, 2024
    Inventors: Tsung-Sheng Kang, Tao Li, Ruilong Xie, Chih-Chao Yang
  • Publication number: 20240088034
    Abstract: A microelectronic structure including a first nano device, where the first nano device includes a plurality of transistors. A bottom dielectric isolation located on the backside of each of the plurality of transistors of the first nano device. A separating dielectric layer located on the backside of the bottom dielectric isolation layer, where the separating dielectric layer is a continuous layer on the backside of each of the plurality of transistors of the first nano device.
    Type: Application
    Filed: September 9, 2022
    Publication date: March 14, 2024
    Inventors: Tsung-Sheng Kang, Tao Li, Ruilong Xie, Chih-Chao Yang
  • Publication number: 20240077760
    Abstract: A display device includes: a frame, including a frame body, a first protrusion disposed on the frame body, and a second protrusion disposed on the frame body, the second protrusion including at least one stepped portion; a display panel, located on a side of one stepped portion of the at least one stepped portion close to a light emitting surface of the display device and located on an inner side of the frame body; and a planar back housing, fixed on the inner side of the frame body and a side of the first protrusion away from the light emitting surface.
    Type: Application
    Filed: October 31, 2023
    Publication date: March 7, 2024
    Inventors: Hao LIU, Yunben SHEN, Guangning HAO, Tao NI, Yang LIU, Lihua SHENG
  • Patent number: 11919906
    Abstract: Crystalline forms of ACP-196, preparation methods, pharmaceutical compositions and uses thereof in the preparation of drugs for treatment and/or prevention of Bruton's tyrosine kinase (BTK)-mediated disorders such as autoimmune diseases or disorders, heteroimmune diseases or disorders, cancers including lymphoma and inflammatory diseases or disorders. As compared with the known solid form of ACP-196, the crystalline forms of the present invention have advantages in crystallinity.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: March 5, 2024
    Assignee: Hangzhou SoliPharma Co., Ltd.
    Inventors: Xiaohong Sheng, Xiaoxia Sheng, Tao Zhu
  • Patent number: 11901323
    Abstract: A semiconductor package includes a first device, a second device and a solder region. The first device includes a first conductive pillar, wherein the first conductive pillar has a first sidewall, a second sidewall opposite to the first sidewall, a first surface and a second surface physically connected to the first surface, the first surface and the second surface are disposed between the first sidewall and the second sidewall, and an included angle is formed between the first surface and the second surface. The solder region is disposed between the first conductive pillar and the second device to bond the first device and the second device.
    Type: Grant
    Filed: June 16, 2022
    Date of Patent: February 13, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chiang-Jui Chu, Ching-Wen Hsiao, Hao-Chun Liu, Ming-Da Cheng, Young-Hwa Wu, Tao-Sheng Chang