Patents by Inventor Tarunvir Singh

Tarunvir Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136989
    Abstract: A system includes an operational amplifier which includes a first amplifier input, a second amplifier input and an amplifier output. The system includes a first switch which includes a first terminal and includes a second terminal coupled to the first amplifier input. The system includes a second switch which includes a first terminal coupled to the first amplifier input and a second terminal coupled to the second amplifier input. The system includes a first bias current source coupled between the first amplifier input and a common potential and includes a second bias current source coupled between the first terminal of the first switch and the common potential. The system includes a feedback path between the amplifier output and the first amplifier input.
    Type: Application
    Filed: October 23, 2022
    Publication date: April 25, 2024
    Inventors: Harsh Sheokand, Tarunvir Singh, Anant Kamath, Suvadip Banerjee
  • Publication number: 20240021546
    Abstract: Described examples include an apparatus including a package substrate having a die attach pad and a first semiconductor die on the die attach pad, the first semiconductor die including a transmitter. The apparatus also includes an assembly having a first plate coupled to the transmitter, a second plate separated from the first plate by a dielectric and a second semiconductor die on the die attach pad, the second semiconductor die including a receiver coupled to the second plate.
    Type: Application
    Filed: August 1, 2023
    Publication date: January 18, 2024
    Inventors: Sreeram SubramanyamNasum, Vijaylaxmi Khanolkar, Tarunvir Singh
  • Patent number: 11715707
    Abstract: Described examples include an apparatus including a package substrate having a die attach pad and a first semiconductor die on the die attach pad, the first semiconductor die including a transmitter. The apparatus also includes an assembly having a first plate coupled to the transmitter, a second plate separated from the first plate by a dielectric and a second semiconductor die on the die attach pad, the second semiconductor die including a receiver coupled to the second plate.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: August 1, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sreeram SubramanyamNasum, Vijaylaxmi Khanolkar, Tarunvir Singh
  • Patent number: 11688672
    Abstract: An electronic device having a package structure with conductive leads, first and second dies in the package structure, as well as first and second conductive plates electrically coupled to the respective first and second dies and having respective first and second sides spaced apart from and directly facing one another with a portion of the package structure extending between the first side of the first conductive plate and the second side of the second conductive plate to form a capacitor. No other side of the first conductive plate directly faces a side of the second conductive plate, and no other side of the second conductive plate directly faces a side of the first conductive plate.
    Type: Grant
    Filed: November 16, 2021
    Date of Patent: June 27, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Vijaylaxmi Khanolkar, Sreeram Subramanyam Nasum, Tarunvir Singh
  • Patent number: 11677315
    Abstract: A system includes a switching converter, an input voltage source coupled to an input of the switching converter, and a load coupled to an output of the switching converter. The system also includes a load sense circuit coupled to the load and configured to provide a load sense signal. The system also includes an oscillator coupled to the switching converter and configured to provide a spread spectrum modulated (SSM) clock signal to the switching converter, wherein a frequency of the SSM clock signal varies as a function of the load sense signal.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: June 13, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Srinivasa Rao Madala, Suvadip Banerjee, Sudhir Komarla Adinarayana, Tarunvir Singh
  • Publication number: 20230111096
    Abstract: In an example, a method of operating a repeater having an isolation barrier to isolate a host side of the repeater from a peripheral side of the repeater, the repeater operable to be coupled to a universal serial bus (USB), includes causing the host side to enter into a suspend mode. The method also includes, responsive to entering the suspend mode, disabling a host isolation transceiver at the host side. The method includes periodically enabling the host isolation transceiver to transmit a data signal from the host side to the peripheral side. The method includes exiting the suspend mode. The method also includes enabling the host isolation transceiver.
    Type: Application
    Filed: April 28, 2022
    Publication date: April 13, 2023
    Inventors: Rakesh HARIHARAN, Tarunvir SINGH, Anant Shankar KAMATH, Mark Edward WENTROBLE, Christopher Joseph RODRIGUES, Prajwala PUTTAPPA
  • Publication number: 20220077038
    Abstract: An electronic device having a package structure with conductive leads, first and second dies in the package structure, as well as first and second conductive plates electrically coupled to the respective first and second dies and having respective first and second sides spaced apart from and directly facing one another with a portion of the package structure extending between the first side of the first conductive plate and the second side of the second conductive plate to form a capacitor. No other side of the first conductive plate directly faces a side of the second conductive plate, and no other side of the second conductive plate directly faces a side of the first conductive plate.
    Type: Application
    Filed: November 16, 2021
    Publication date: March 10, 2022
    Inventors: Vijaylaxmi Khanolkar, Sreeram Subramanyam Nasum, Tarunvir Singh
  • Publication number: 20220077788
    Abstract: DC-DC power converter architecture is disclosed. In an example, an integrated circuit includes an H-bridge switching circuit operatively coupled with a transformer. The switching circuit is compensated to account for parasitic differences between the high-side (power) and low-side (ground). For instance, PMOS transistors connected to the high-side are sized larger to substantially match on-resistance of NMOS transistors connected to the low-side (e.g., such that the on-resistances are all within a tolerance of one another, or within a tolerance of a target on-resistance value), and the NMOS transistors include additional gate-drain capacitance to substantially match gate-drain capacitance of the larger PMOS transistors (e.g., such that the gate-drain capacitances are all within a tolerance of one another, or within a tolerance of a target gate-drain capacitance value).
    Type: Application
    Filed: April 21, 2021
    Publication date: March 10, 2022
    Inventors: Tarunvir Singh, Suvadip Banerjee, Sreeram Subramanyam Nasum
  • Patent number: 11205611
    Abstract: An electronic device having a package structure with conductive leads, first and second dies in the package structure, as well as first and second conductive plates electrically coupled to the respective first and second dies and having respective first and second sides spaced apart from and directly facing one another with a portion of the package structure extending between the first side of the first conductive plate and the second side of the second conductive plate to form a capacitor. No other side of the first conductive plate directly faces a side of the second conductive plate, and no other side of the second conductive plate directly faces a side of the first conductive plate.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: December 21, 2021
    Assignee: Texas Instruments Incorporated
    Inventors: Vijaylaximi Khanolkar, Sreeram Subramanyam Nasum, Tarunvir Singh
  • Publication number: 20210391240
    Abstract: An electronic device having a package structure with conductive leads, first and second dies in the package structure, as well as first and second conductive plates electrically coupled to the respective first and second dies and having respective first and second sides spaced apart from and directly facing one another with a portion of the package structure extending between the first side of the first conductive plate and the second side of the second conductive plate to form a capacitor. No other side of the first conductive plate directly faces a side of the second conductive plate, and no other side of the second conductive plate directly faces a side of the first conductive plate.
    Type: Application
    Filed: June 15, 2020
    Publication date: December 16, 2021
    Inventors: Vijaylaximi Khanolkar, Sreeram Subramanyam Nasum, Tarunvir Singh
  • Publication number: 20210376715
    Abstract: A system includes a switching converter, an input voltage source coupled to an input of the switching converter, and a load coupled to an output of the switching converter. The system also includes a load sense circuit coupled to the load and configured to provide a load sense signal. The system also includes an oscillator coupled to the switching converter and configured to provide a spread spectrum modulated (SSM) clock signal to the switching converter, wherein a frequency of the SSM clock signal varies as a function of the load sense signal.
    Type: Application
    Filed: November 24, 2020
    Publication date: December 2, 2021
    Inventors: Srinivasa Rao MADALA, Suvadip BANERJEE, Sudhir Komarla ADINARAYANA, Tarunvir SINGH
  • Patent number: 11119971
    Abstract: Disclosed embodiments include a serial buffer device comprising first and second serial input/output (I/O) ports, first and second comparators, and a multiplexer having a first input coupled to the output of the first comparator and a second input coupled to the output of the second comparator. There is also a transistor, a third comparator having first and second inputs and an output, wherein the first input is coupled to the second serial I/O port, the second input is coupled to a third reference voltage source, and the output is coupled to the control terminal of the multiplexer. Additionally, the embodiment includes an impedance controlled driver circuit having an input and an output, wherein the input is coupled to the output of the third comparator and the output is coupled to the first serial I/O port.
    Type: Grant
    Filed: October 15, 2020
    Date of Patent: September 14, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Tarunvir Singh, Anant Shankar Kamath
  • Publication number: 20210202405
    Abstract: Described examples include an apparatus including a package substrate having a die attach pad and a first semiconductor die on the die attach pad, the first semiconductor die including a transmitter. The apparatus also includes an assembly having a first plate coupled to the transmitter, a second plate separated from the first plate by a dielectric and a second semiconductor die on the die attach pad, the second semiconductor die including a receiver coupled to the second plate.
    Type: Application
    Filed: December 30, 2019
    Publication date: July 1, 2021
    Inventors: Sreeram SubramanyamNasum, Vijaylaxmi Khanolkar, Tarunvir Singh
  • Patent number: 11038461
    Abstract: A digital isolator comprising a set of bipolar transistors and an inductor capacitor (LC) oscillator coupled to the set of bipolar transistors in series, wherein the LC oscillator is configured to be turned on and off based on the current applied to the set of bipolar transistors or the LC oscillator and generate a set of differential signals based on the current flowing through the set of bipolar transistors and mimicking the operational characteristics of an optocoupler.
    Type: Grant
    Filed: August 20, 2020
    Date of Patent: June 15, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Tarunvir Singh, Kumar Anurag Shrivastava, Somshubhra Paul, Sreeram Subramanyam Nasum
  • Publication number: 20200382057
    Abstract: A digital isolator comprising a set of bipolar transistors and an inductor capacitor (LC) oscillator coupled to the set of bipolar transistors in series, wherein the LC oscillator is configured to be turned on and off based on the current applied to the set of bipolar transistors or the LC oscillator and generate a set of differential signals based on the current flowing through the set of bipolar transistors and mimicking the operational characteristics of an optocoupler.
    Type: Application
    Filed: August 20, 2020
    Publication date: December 3, 2020
    Inventors: Tarunvir SINGH, Kumar Anurag SHRIVASTAVA, Somshubhra PAUL, Sreeram Subramanyam NASUM
  • Patent number: 10840013
    Abstract: A device includes a transformer that further includes a primary and a secondary windings. A switch is coupled to the primary winding, and this switch is controlled by the received digital input signal. An oscillator is further formed on the secondary winding where the oscillator oscillates in response to variations of the received input signal. A detector coupled to the oscillator will then detect the oscillations in response to the variations of the received input signal. Thereafter, the detector generates a digital output based on the detected oscillations.
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: November 17, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sreeram Subramanyam Nasum, Tarunvir Singh, Suvadip Banerjee, Kumar Anurag Shrivastava
  • Patent number: 10790782
    Abstract: A digital isolator comprising a set of bipolar transistors and an inductor capacitor (LC) oscillator coupled to the set of bipolar transistors in series, wherein the LC oscillator is configured to be turned on and off based on the current applied to the set of bipolar transistors or the LC oscillator and generate a set of differential signals based on the current flowing through the set of bipolar transistors and mimicking the operational characteristics of an optocoupler.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: September 29, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Tarunvir Singh, Kumar Anurag Shrivastava, Somshubhra Paul, Sreeram Subramanyam Nasum
  • Publication number: 20200119689
    Abstract: A digital isolator comprising a set of bipolar transistors and an inductor capacitor (LC) oscillator coupled to the set of bipolar transistors in series, wherein the LC oscillator is configured to be turned on and off based on the current applied to the set of bipolar transistors or the LC oscillator and generate a set of differential signals based on the current flowing through the set of bipolar transistors and mimicking the operational characteristics of an optocoupler.
    Type: Application
    Filed: December 18, 2018
    Publication date: April 16, 2020
    Inventors: Tarunvir SINGH, Kumar Anurag SHRIVASTAVA, Somshubhra PAUL, Sreeram Subramanyam NASUM
  • Publication number: 20190362890
    Abstract: A device [200, para. 16] includes a transformer [206, para. 16] that further includes a primary [208, para. 16] and a secondary [210, para. 16] windings. A switch [212, para. 20] is coupled to the primary winding, and this switch is controlled by the received digital input signal. An oscillator [216, para. 17] is further formed on the secondary winding where the oscillator oscillates in response to variations of the received input signal. [para. 19] A detector [218, para. 17] coupled to the oscillator will then detect the oscillations in response to the variations of the received input signal. Thereafter, the detector generates a digital output [108, para. 14] based on the detected oscillations. [para.
    Type: Application
    Filed: May 22, 2018
    Publication date: November 28, 2019
    Inventors: Sreeram Subramanyam Nasum, Tarunvir Singh, Suvadip Banerjee, Kumar Anurag Shrivastava