Patents by Inventor Tatsuhiko Koide
Tatsuhiko Koide has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20110220152Abstract: According to one embodiment, a substrate having a plurality of adjacent patterns on one surface thereof is cleaned by cleaning liquid. Subsequently, after the cleaning liquid is displaced with pure water, the pure water is displaced with displacement liquid. Under a condition that the displacement liquid among the patterns does not vaporize, the displacement liquid not contributing to prevention of collapse of the patterns is removed. After the displacement liquid is removed, the substrate is held in supercritical fluid and the displacement liquid among the patterns is displaced with the supercritical fluid. After the displacement liquid among the patterns is displaced with the supercritical fluid, the supercritical fluid adhering to the substrate is vaporized.Type: ApplicationFiled: December 9, 2010Publication date: September 15, 2011Inventors: Yukiko KITAJIMA, Hisashi Okuchi, Hiroshi Tomita, Hidekazu Hayashi, Tatsuhiko Koide
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Patent number: 7985683Abstract: A method of treating a semiconductor substrate has forming convex patterns over the semiconductor substrate by dry etching, cleaning and modifying a surface of the convex patterns by using chemical, forming a hydrophobic functional surface on the modified surface of the convex patterns, after forming the hydrophobic functional surface, rinsing the semiconductor substrate by using water, drying the semiconductor substrate, and removing the hydrophobic functional group from the hydrophobic functional surface of the convex patterns.Type: GrantFiled: May 26, 2010Date of Patent: July 26, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Tomita, Tatsuhiko Koide, Hisashi Okuchi, Kentaro Shimayama, Hiroyasu Iimori, Linan Ji
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Publication number: 20110139192Abstract: In one embodiment, a surface treatment apparatus for a semiconductor substrate includes a holding unit, a first supply unit, a second supply unit, a third supply unit, a drying treatment unit, and a removal unit. The holding unit holds a semiconductor substrate with a surface having a convex pattern formed thereon. The first supply unit supplies a chemical solution to the surface of the semiconductor substrate, to perform cleaning and oxidation. The second supply unit supplies pure water to the surface of the semiconductor substrate, to rinse the semiconductor substrate. The third supply unit supplies a water repelling agent to the surface of the semiconductor substrate, to form a water repellent protective film on the surface of the convex pattern. The drying treatment unit dries the semiconductor substrate. The removal unit removes the water repellent protective film while making the convex pattern remain.Type: ApplicationFiled: September 21, 2010Publication date: June 16, 2011Inventors: Tatsuhiko KOIDE, Shinsuke KIMURA, Yoshihiro OGAWA, Hisashi OKUCHI, Hiroshi TOMITA
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Publication number: 20110143541Abstract: In one embodiment, an apparatus of treating a surface of a semiconductor substrate comprises a substrate holding and rotating unit, first to fourth supplying units, and a removing unit. A substrate holding and rotating unit holds a semiconductor substrate, having a convex pattern formed on its surface, and rotates the semiconductor substrate. A first supplying unit supplies a chemical onto the surface of the semiconductor substrate in order to clean the semiconductor substrate. A second supplying unit supplies pure water to the surface of the semiconductor substrate in order to rinse the semiconductor substrate. A third supplying unit supplies a water repellent agent to the surface of the semiconductor substrate in order to form a water repellent protective film onto the surface of the convex pattern. A fourth supplying unit supplies alcohol, which is diluted with pure water, or acid water to the surface of the semiconductor substrate in order to rinse the semiconductor substrate.Type: ApplicationFiled: September 20, 2010Publication date: June 16, 2011Inventors: Yoshihiro OGAWA, Tatsuhiko Koide, Shinsuke Kimura, Hisashi Okuchi, Hiroshi Tomita
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Publication number: 20110143545Abstract: In one embodiment, an apparatus of treating a surface of a semiconductor substrate comprises a substrate holding and rotating unit which holds a semiconductor substrate with a surface having a convex pattern formed thereon and rotates the semiconductor substrate, a first supply unit which supplies a chemical and/or pure water to the surface of the semiconductor substrate, and a second supply unit which supplies a diluted water repellent to the surface of the semiconductor substrate to form a water-repellent protective film on the surface of the convex pattern. The second supply unit comprises a buffer tank which stores the water repellent, a first supply line which supplies a purge gas to the buffer tank, a second supply line which supplies a diluent, a pump which sends off the water repellent within the buffer tank, a third supply line which supplies the water repellent sent off from the pump, and a mixing valve which mixes the diluent and the water repellent to produce the diluted water repellent.Type: ApplicationFiled: September 10, 2010Publication date: June 16, 2011Inventors: Hisashi OKUCHI, Tatsuhiko Koide, Shinsuke Kimura, Yoshihiro Ogawa, Hiroshi Tomita
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Patent number: 7838425Abstract: A method of treating the surface of a semiconductor substrate has cleaning the semiconductor substrate having a pattern formed thereon by using a chemical solution, removing the chemical solution by using pure water, forming a water repellent protective film on the surface of the semiconductor substrate, rinsing the semiconductor substrate by using pure water, and drying the semiconductor substrate.Type: GrantFiled: October 24, 2008Date of Patent: November 23, 2010Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Tomita, Hiroyasu Iimori, Hisashi Okuchi, Tatsuhiko Koide, Linan Ji
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Publication number: 20100267233Abstract: A metal member layer on a silicon member layer is patterned. A sidewall film is formed on a surface of the metal member layer. The silicon member layer is patterned to form a structure including the silicon member layer and the metal member layer, the surface of which is covered with the sidewall film. After the surface of the structure is cleaned, a water-repellent protective film is formed on the surface of the structure before the surface of the structure is dried.Type: ApplicationFiled: March 2, 2010Publication date: October 21, 2010Inventors: Tatsuhiko Koide, Hisashi Okuchi, Hidekazu Hayashi, Hiroshi Tomita
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Publication number: 20100240219Abstract: A method of treating a semiconductor substrate has forming convex patterns over the semiconductor substrate by dry etching, cleaning and modifying a surface of the convex patterns by using chemical, forming a hydrophobic functional surface on the modified surface of the convex patterns, after forming the hydrophobic functional surface, rinsing the semiconductor substrate by using water, drying the semiconductor substrate, and removing the hydrophobic functional group from the hydrophobic functional surface of the convex patterns.Type: ApplicationFiled: May 26, 2010Publication date: September 23, 2010Applicant: Kabushiki Kaisha ToshibaInventors: Hiroshi Tomita, Tatsuhiko Koide, Hisashi Okuchi, Kentaro Shimayama, Hiroyasu Iimori, Linan Ji
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Patent number: 7749909Abstract: A method of treating a semiconductor substrate has forming convex patterns over the semiconductor substrate by dry etching, cleaning and modifying a surface of the convex patterns by using chemical, forming a hydrophobic functional surface on the modified surface of the convex patterns, after forming the hydrophobic functional surface, rinsing the semiconductor substrate by using water, drying the semiconductor substrate, and removing the hydrophobic functional group from the hydrophobic functional surface of the convex patterns.Type: GrantFiled: October 6, 2009Date of Patent: July 6, 2010Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Tomita, Tatsuhiko Koide, Hisashi Okuchi, Kentaro Shimayama, Hiroyasu Iimori, Linan Ji
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Publication number: 20100075504Abstract: A method of treating a semiconductor substrate has forming convex patterns over the semiconductor substrate by dry etching, cleaning and modifying a surface of the convex patterns by using chemical, forming a hydrophobic functional surface on the modified surface of the convex patterns, after forming the hydrophobic functional surface, rinsing the semiconductor substrate by using water, drying the semiconductor substrate, and removing the hydrophobic functional group from the hydrophobic functional surface of the convex patterns.Type: ApplicationFiled: October 6, 2009Publication date: March 25, 2010Inventors: Hiroshi Tomita, Tatsuhiko Koide, Hisashi Okuchi, Kentaro Shimayama, Hiroyasu Iimori, Linan Ji
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Publication number: 20100044343Abstract: A substrate treatment apparatus for treating a substrate on which a plurality of patterns are formed adjacently, has a first chamber which has resistance to a chemical and cleans the substrate with the chemical; a second chamber which is disposed above or below the first chamber, has higher pressure resistance than the first chamber, and supercritically dries the substrate; and a gate unit which is provided between the first and second chambers and can be opened/closed.Type: ApplicationFiled: August 21, 2009Publication date: February 25, 2010Inventors: Hiroshi Tomita, Linan Ji, Hisashi Okuchi, Tatsuhiko Koide, Hiroyasu Iimori, Hidekazu Hayashi
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Publication number: 20090311874Abstract: A method of treating the surface of a semiconductor substrate has cleaning the semiconductor substrate having a pattern formed thereon by using a chemical solution, removing the chemical solution by using pure water, forming a water repellent protective film on the surface of the semiconductor substrate, rinsing the semiconductor substrate by using pure water, and drying the semiconductor substrate.Type: ApplicationFiled: October 24, 2008Publication date: December 17, 2009Inventors: Hiroshi Tomita, Hiroyasu Iimori, Hisashi Okuchi, Tatsuhiko Koide, Linan Ji
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Patent number: 7564075Abstract: A semiconductor device provided with an emitter layer having a narrowed base contact portion. The semiconductor device includes a collector layer arranged on a semiconductor substrate. A conductive layer is arranged on the collector layer. A silicon film is arranged on the conductive layer. An emitter electrode is arranged on the silicon film. A first film covers the side of the emitter electrode. The silicon film includes a first region contacting the emitter electrode and a second region differing from the first region. A contact surface between the first region and the emitter electrode is located at a level that is higher than that of the lower surface of the first film. At least part of the second region of the silicon film is located between the conductive layer and the first film and is in contact with the conductive layer and the first film.Type: GrantFiled: July 15, 2005Date of Patent: July 21, 2009Assignee: Sanyo Electric Co., Ltd.Inventors: Shuji Fujiwara, Tatsuhiko Koide
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Patent number: 7446009Abstract: A semiconductor device manufacturing method including forming a conductive layer and a silicon film on a semiconductor substrate including an active region, forming an emitter electrode containing a first impurity on the silicon film above the active region, partially etching the silicon film using the emitter electrode as a mask, forming an insulative film covering the semiconductor substrate and a side wall film covering a side surface of the emitter electrode, introducing a second impurity into the conductive layer and silicon film so that the second impurity reaches the active region to form an impurity region containing the second impurity in parts of the conductive layer and silicon film, and diffusing the first impurity contained in the emitter electrode into the silicon film to form in the silicon film a first region containing the first impurity and a second region free of the first impurity.Type: GrantFiled: November 9, 2006Date of Patent: November 4, 2008Assignee: Sanyo Electric Co., Ltd.Inventors: Daichi Suma, Yoshikazu Ibara, Tatsuhiko Koide, Koichi Saito
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Publication number: 20080251882Abstract: A semiconductor device includes a first insulating isolation film provided on a main surface of a semiconductor substrate, an active region surrounded by the first insulating isolation film, and a second insulating isolation film provided on the main surface of the semiconductor substrate, having a thickness smaller than that of the first insulating isolation film and separating the active region into a first active region and a second active region.Type: ApplicationFiled: March 28, 2008Publication date: October 16, 2008Inventor: Tatsuhiko KOIDE
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Publication number: 20070111459Abstract: A semiconductor device manufacturing method including forming a conductive layer and a silicon film on a semiconductor substrate including an active region, forming an emitter electrode containing a first impurity on the silicon film above the active region, partially etching the silicon film using the emitter electrode as a mask, forming an insulative film covering the semiconductor substrate and a side wall film covering a side surface of the emitter electrode, introducing a second impurity into the conductive layer and silicon film so that the second impurity reaches the active region to form an impurity region containing the second impurity in parts of the conductive layer and silicon film, and diffusing the first impurity contained in the emitter electrode into the silicon film to form in the silicon film a first region containing the first impurity and a second region free of the first impurity.Type: ApplicationFiled: November 9, 2006Publication date: May 17, 2007Inventors: Daichi Suma, Yoshikazu Ibara, Tatsuhiko Koide, Koichi Saito
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Patent number: 7129530Abstract: A high capacity semiconductor device having a narrowed emitter layer. The semiconductor device includes a collector layer formed on a semiconductor substrate. An SiGe alloy layer is formed on the collector layer. A silicon film is formed on the SiGe layer. An emitter electrode is formed on the silicon film. A side wall film covers the side surface of the emitter electrode. The bottom surface of the emitter electrode is located above the lower surface of the side wall film. Part of the second region of the silicon film is located between the SiGe alloy layer and the side wall film. An impurity region is formed adjacent to the conductive layer. A silicide film is formed along the side surface of the second region, the side surface of the conductive layer, and the surface of the impurity region.Type: GrantFiled: September 29, 2005Date of Patent: October 31, 2006Assignee: Sanyo Electric Co., Ltd.Inventors: Koichi Saito, Yoshikazu Ibara, Tatsuhiko Koide, Daichi Suma
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Publication number: 20060071239Abstract: A high capacity semiconductor device having a narrowed emitter layer. The semiconductor device includes a collector layer formed on a semiconductor substrate. An SiGe alloy layer is formed on the collector layer. A silicon film is formed on the SiGe layer. An emitter electrode is formed on the silicon film. A side wall film covers the side surface of the emitter electrode. The bottom surface of the emitter electrode is located above the lower surface of the side wall film. Part of the second region of the silicon film is located between the SiGe alloy layer and the side wall film. An impurity region is formed adjacent to the conductive layer. A silicide film is formed along the side surface of the second region, the side surface of the conductive layer, and the surface of the impurity region.Type: ApplicationFiled: September 29, 2005Publication date: April 6, 2006Inventors: Koichi Saito, Yoshikazu Ibara, Tatsuhiko Koide, Daichi Suma
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Publication number: 20060065950Abstract: A high performance semiconductor device including a silicon oxide film that surrounds an SiGe alloy layer, which functions as a base layer, and an n-type diffusion layer, which functions as an emitter layer. Under a polycrystalline silicon film, the silicon oxide film extends over a boundary between an active region and an element isolation film. After a flat interlayer dielectric is formed, a lead wire is connected to a silicide film located above the isolation film.Type: ApplicationFiled: September 30, 2005Publication date: March 30, 2006Inventors: Tatsuhiko Koide, Yoshikazu Ibara, Koichi Saito, Daichi Suma, Reiki Fujimori
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Publication number: 20060011944Abstract: A semiconductor device provided with an emitter layer having a narrowed base contact portion. The semiconductor device includes a collector layer arranged on a semiconductor substrate. A conductive layer is arranged on the collector layer. A silicon film is arranged on the conductive layer. An emitter electrode is arranged on the silicon film. A first film covers the side of the emitter electrode. The silicon film includes a first region contacting the emitter electrode and a second region differing from the first region. A contact surface between the first region and the emitter electrode is located at a level that is higher than that of the lower surface of the first film. At least part of the second region of the silicon film is located between the conductive layer and the first film and is in contact with the conductive layer and the first film.Type: ApplicationFiled: July 15, 2005Publication date: January 19, 2006Inventors: Shuji Fujiwara, Tatsuhiko Koide