Patents by Inventor Tatsuhiro Seki

Tatsuhiro Seki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240167488
    Abstract: A fluid circuit includes: a fluid supply device that delivers a working fluid; and an accumulator that accumulates the working fluid which is increased in pressure. A variable throttle valve and the accumulator are disposed in a branch flow passage branched from a main flow passage extending from the fluid supply device to an actuator. A first pressure detector is provided between the variable throttle valve and the accumulator, a second pressure detector is provided in the branch flow passage between the main flow passage and the variable throttle valve, and the variable throttle valve is controllable based on pressures detected by the first pressure detector and the second pressure detector. A check valve is provided in the branch flow passage.
    Type: Application
    Filed: March 17, 2022
    Publication date: May 23, 2024
    Inventors: Tatsuhiro ARIKAWA, Yoshiyuki SHIMADA, Tomoki SEKI, Yuta OKAMOTO, Koji SATO
  • Publication number: 20240159255
    Abstract: A first switching valve that switches between flow passages which allow communication between a first pressure-receiving chamber and a fluid supply device side and flow passages which allow communication between a second pressure-receiving chamber and the fluid supply device side, according to a change in a fluid pressure to be applied, and a second switching valve that is switched to flow passages which apply the fluid pressure to the first switching valve, are provided. The second switching valve includes return device, and is provided to be reciprocatable between an operation position to which the second switching valve is moved by a stroke of a piston and a return position to which the second switching valve is moved by the return device. The piston and the second switching valve are movable independently of each other.
    Type: Application
    Filed: March 17, 2022
    Publication date: May 16, 2024
    Inventors: Yoshiyuki SHIMADA, Koji SATO, Yuta OKAMOTO, Tomoki SEKI, Tatsuhiro ARIKAWA
  • Publication number: 20240159252
    Abstract: A fluid circuit includes first switching valve that switches between flow passages and first flow passages according to a change in a fluid pressure to be applied, a second switching valve that is switched to a flow passage which applies the fluid pressure to the first switching valve, when a piston has reached an initial position or an end position, and second flow passages. A biasing force of a biasing member when the piston reaches the end position is smaller than a pressing force acting on the piston due to the fluid pressure caused by a fluid supply device, and a biasing force of the biasing member when the piston reaches the initial position is larger than a sum of a flow passage resistance force acting on the first flow passages and a flow passage resistance force acting on the second flow passages.
    Type: Application
    Filed: March 17, 2022
    Publication date: May 16, 2024
    Inventors: Yoshiyuki SHIMADA, Koji SATO, Yuta OKAMOTO, Tomoki SEKI, Tatsuhiro ARIKAWA
  • Publication number: 20240043118
    Abstract: A control device 133 acquires distance information indicating a distance between an UAV 1 and an article B positioned under the UAV 1 and controls a winch 16 to unreel a linear member 15 on the basis of the distance indicated in the acquired distance information.
    Type: Application
    Filed: July 25, 2023
    Publication date: February 8, 2024
    Applicant: Rakuten Group, Inc
    Inventors: Asaki MATSUMOTO, Tatsuhiro SEKI, Takayoshi INUMA
  • Patent number: 10854588
    Abstract: A semiconductor device includes a normally-on junction FET having a first gate electrode, a first source electrode and a first drain electrode, a normally-off MOSFET having a second gate electrode, a second source electrode and a second drain electrode, and a voltage applying unit which applies a voltage to the first gate electrode. The first source electrode of the junction FET is electrically connected to the second drain electrode of the MOSFET, and the junction FET is thus connected to the MOSFET in series, and the voltage applying unit applies a second voltage with a polarity opposite to that of a first voltage applied to the first gate electrode when the junction FET is brought into an off-state, to the first gate electrode when the MOSFET is in an on-state.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: December 1, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Hisashi Toyoda, Koichi Yamazaki, Koichi Arai, Tatsuhiro Seki
  • Publication number: 20180082991
    Abstract: A semiconductor device includes a normally-on junction FET having a first gate electrode, a first source electrode and a first drain electrode, a normally-off MOSFET having a second gate electrode, a second source electrode and a second drain electrode, and a voltage applying unit which applies a voltage to the first gate electrode. The first source electrode of the junction FET is electrically connected to the second drain electrode of the MOSFET, and the junction FET is thus connected to the MOSFET in series, and the voltage applying unit applies a second voltage with a polarity opposite to that of a first voltage applied to the first gate electrode when the junction FET is brought into an off-state, to the first gate electrode when the MOSFET is in an on-state.
    Type: Application
    Filed: November 28, 2017
    Publication date: March 22, 2018
    Inventors: Hisashi TOYODA, Koichi YAMAZAKI, Koichi ARAI, Tatsuhiro SEKI
  • Patent number: 9837395
    Abstract: A semiconductor device includes a normally-on junction FET having a gate electrode, a source electrode and a drain electrode and a normally-off MOSFET having a gate electrode, a source electrode and a drain electrode. The source electrode of the junction FET is electrically connected to the drain electrode of the MOSFET, and the junction FET is thus connected to the MOSFET in series. The gate electrode of the junction FET is electrically connected to the gate electrode of the MOSFET.
    Type: Grant
    Filed: April 12, 2016
    Date of Patent: December 5, 2017
    Assignee: Renesas Electrics Corporation
    Inventors: Hisashi Toyoda, Koichi Yamazaki, Koichi Arai, Tatsuhiro Seki
  • Publication number: 20160315075
    Abstract: A semiconductor device includes a normally-on junction FET having a gate electrode, a source electrode and a drain electrode and a normally-off MOSFET having a gate electrode, a source electrode and a drain electrode. The source electrode of the junction FET is electrically connected to the drain electrode of the MOSFET, and the junction FET is thus connected to the MOSFET in series. The gate electrode of the junction FET is electrically connected to the gate electrode of the MOSFET.
    Type: Application
    Filed: April 12, 2016
    Publication date: October 27, 2016
    Inventors: Hisashi TOYODA, Koichi Yamazaki, Koichi Arai, Tatsuhiro Seki
  • Patent number: 8624379
    Abstract: A semiconductor device is improved in reliability. A switching power MOSFET and a sense MOSFET for sensing a current flowing in the power MOSFET, which is smaller in area than the power MOSFET, are formed in one semiconductor chip. The semiconductor chip is mounted over a chip mounting portion via a conductive bonding material, and sealed in a resin. Over the main surface of the semiconductor chip, a metal plate is bonded to a source pad electrode of the power MOSFET. In the plan view, the metal plate does not overlap a sense MOSFET region where the sense MOSFET is formed. The metal plate is bonded to the source pad electrode so as to surround three of the sides of the sense MOSFET region.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: January 7, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Hiroyuki Nakamura, Yukihiro Sato, Atsushi Fujiki, Tatsuhiro Seki
  • Patent number: 8564112
    Abstract: To improve the performance and reliability of semiconductor devices. For the semiconductor chip CP1, power MOSFETs Q1 and Q2 for the switch, a diode DD1 for detecting the heat generation of the power MOSFET Q1, a diode DD2 for detecting the heat generation of the power MOSFET Q2, and plural pad electrodes PD are formed. The power MOSFET Q1 and the diode DD1 are arranged in a first MOSFET region RG1 on the side of a side SD1, and the power MOSFET Q2 and the diode DD2 are arranged in a second MOSFET region RG2 on the side of a side SD2. The diode DD1 is arranged along the side SD1, the diode DD2 is arranged along the side SD2, and all pad electrodes PD other than the pad electrodes PDS1 and PDS2 for the source are arranged along a side SD3 between the diodes DD1 and DD2.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: October 22, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Hiroyuki Nakamura, Atsushi Fujiki, Tatsuhiro Seki, Nobuya Koike, Yukihiro Sato, Kisho Ashida
  • Publication number: 20130082334
    Abstract: A semiconductor device is improved in reliability. A switching power MOSFET and a sense MOSFET for sensing a current flowing in the power MOSFET, which is smaller in area than the power MOSFET, are formed in one semiconductor chip. The semiconductor chip is mounted over a chip mounting portion via a conductive bonding material, and sealed in a resin. Over the main surface of the semiconductor chip, a metal plate is bonded to a source pad electrode of the power MOSFET. In the plan view, the metal plate does not overlap a sense MOSFET region where the sense MOSFET is formed. The metal plate is bonded to the source pad electrode so as to surround three of the sides of the sense MOSFET region.
    Type: Application
    Filed: September 12, 2012
    Publication date: April 4, 2013
    Inventors: Hiroyuki NAKAMURA, Yukihiro Sato, Atsushi Fujiki, Tatsuhiro Seki
  • Patent number: 8299599
    Abstract: To improve the performance and reliability of semiconductor devices. For the semiconductor chip CP1, power MOSFETs Q1 and Q2 for the switch, a diode DD1 for detecting the heat generation of the power MOSFET Q1, a diode DD2 for detecting the heat generation of the power MOSFET Q2, and plural pad electrodes PD are formed. The power MOSFET Q1 and the diode DD1 are arranged in a first MOSFET region RG1 on the side of a side SD1, and the power MOSFET Q2 and the diode DD2 are arranged in a second MOSFET region RG2 on the side of a side SD2. The diode DD1 is arranged along the side SD1, the diode DD2 is arranged along the side SD2, and all pad electrodes PD other than the pad electrodes PDS1 and PDS2 for the source are arranged along a side SD3 between the diodes DD1 and DD2.
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: October 30, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Hiroyuki Nakamura, Atsushi Fujiki, Tatsuhiro Seki, Nobuya Koike, Yukihiro Sato, Kisho Ashida
  • Publication number: 20120049187
    Abstract: Accompanying the miniaturization of a gate electrode of a trench gate power MOSFET, the curvature of the bottom part of the trench increases, and thereby, electric fields concentrate on the part and deterioration of a gate oxide film (insulating film) occurs. The deterioration of the gate insulating film is more likely to occur when the gate side bias is negative in the case of an N-channel type power MOSFET and when the gate side bias is positive in the case of a P-channel type power MOSFET. The present invention is a semiconductor device including an insulating gate power transistor etc. in a chip, wherein a gate protection element includes a bidirectional Zener diode and the bidirectional Zener diode has a plurality of P-type impurity regions (or a P-type impurity region) having different concentrations so that the withstand voltage with its gate side negatively biased and the withstand voltage with the gate side positively biased are different from each other.
    Type: Application
    Filed: August 27, 2011
    Publication date: March 1, 2012
    Inventors: Masamitsu HARUYAMA, Tatsuhiro Seki, Daisuke Arai
  • Publication number: 20110215400
    Abstract: To improve the performance and reliability of semiconductor devices. For the semiconductor chip CP1, power MOSFETs Q1 and Q2 for the switch, a diode DD1 for detecting the heat generation of the power MOSFET Q1, a diode DD2 for detecting the heat generation of the power MOSFET Q2, and plural pad electrodes PD are formed. The power MOSFET Q1 and the diode DD1 are arranged in a first MOSFET region RG1 on the side of a side SD1, and the power MOSFET Q2 and the diode DD2 are arranged in a second MOSFET region RG2 on the side of a side SD2. The diode DD1 is arranged along the side SD1, the diode DD2 is arranged along the side SD2, and all pad electrodes PD other than the pad electrodes PDS1 and PDS2 for the source are arranged along a side SD3 between the diodes DD1 and DD2.
    Type: Application
    Filed: March 3, 2011
    Publication date: September 8, 2011
    Inventors: Hiroyuki NAKAMURA, Atsushi FUJIKI, Tatsuhiro SEKI, Nobuya KOIKE, Yukihiro SATO, Kisho ASHIDA
  • Patent number: 7969000
    Abstract: A semiconductor device having a plurality of chips is reduced in size. In HSOP (semiconductor device) for driving a three-phase motor, a first semiconductor chip including a pMISFET and a second semiconductor chip including an nMISFET are mounted over each of a first tab, second tab, and third tab. The drains of the pMISFET and nMISFET over each tab are electrically connected with each other. Thus, two of six MISFETs can be placed over each of three tabs divided in correspondence with the number of phases of the motor, and they can be packaged in one in a compact manner. As a result, the size of the HSOP for driving a three-phase motor, having a plurality of chips can be reduced.
    Type: Grant
    Filed: February 16, 2010
    Date of Patent: June 28, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Yukihiro Sato, Norio Kido, Tatsuhiro Seki, Katsuo Ishizaka, Ichio Shimizu
  • Publication number: 20100140718
    Abstract: A semiconductor device having a plurality of chips is reduced in size. In HSOP (semiconductor device) for driving a three-phase motor, a first semiconductor chip including a pMISFET and a second semiconductor chip including an nMISFET are mounted over each of a first tab, second tab, and third tab. The drains of the pMISFET and nMISFET over each tab are electrically connected with each other. Thus, two of six MISFETs can be placed over each of three tabs divided in correspondence with the number of phases of the motor, and they can be packaged in one in a compact manner. As a result, the size of the HSOP for driving a three-phase motor, having a plurality of chips can be reduced.
    Type: Application
    Filed: February 16, 2010
    Publication date: June 10, 2010
    Applicant: RENESAS TECHNOLOGY CORP.
    Inventors: Yukihiro Sato, Norio Kido, Tatsuhiro Seki, Katsuo Ishizaka, Ichio Shimizu
  • Patent number: 7692285
    Abstract: A semiconductor device having a plurality of chips is reduced in size. In HSOP (semiconductor device) for driving a three-phase motor, a first semiconductor chip including a pMISFET and a second semiconductor chip including an nMISFET are mounted over each of a first tab, second tab, and third tab. The drains of the pMISFET and nMISFET over each tab are electrically connected with each other. Thus, two of six MISFETs can be placed over each of three tabs divided in correspondence with the number of phases of the motor, and they can be packaged in one in a compact manner. As a result, the size of the HSOP for driving a three-phase motor, having a plurality of chips can be reduced.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: April 6, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Yukihiro Sato, Norio Kido, Tatsuhiro Seki, Katsuo Ishizaka, Ichio Shimizu
  • Publication number: 20070001273
    Abstract: A semiconductor device having a plurality of chips is reduced in size. In HSOP(semiconductor device) for driving a three-phase motor, a first semiconductor chip including a pMISFET and a second semiconductor chip including an nMISFET are mounted over each of a first tab, second tab, and third tab. The drains of the PMISFET and nMISFET over each tab are electrically connected with each other. Thus, two of six MISFETs can be placed over each of three tabs divided in correspondence with the number of phases of the motor, and they can be packaged in one in a compact manner. As a result, the size of the HSOP for driving a three-phase motor, having a plurality of chips can be reduced.
    Type: Application
    Filed: June 29, 2006
    Publication date: January 4, 2007
    Inventors: Yukihiro Sato, Norio Kido, Tatsuhiro Seki, Katsuo Ishizaka, Ichio Shimizu