Abstract: A semiconductor device including a semiconductor chip, a base substrate, a wiring positioned on the base substrate, and a eutectic alloy. A part of the eutectic alloy is positioned between the wiring and the base substrate.

Abstract: A method for manufacturing a semiconductor device, includes: mounting a semiconductor chip having an electrode on a wiring substrate having a base substrate and a wiring formed on the base substrate; forming a eutectic alloy by contacting the wiring with the electrode and by heating and pressurizing, and; forming the eutectic alloy so as a part of the eutectic alloy enters between the wiring and the base substrate.

Abstract: A method for manufacturing a semiconductor device, includes: mounting a semiconductor chip having an electrode on a wiring substrate having a base substrate and a wiring formed on the base substrate; forming a eutectic alloy by contacting the wiring with the electrode and by heating and pressurizing, and; forming the eutectic alloy so as a part of the eutectic alloy enters between the wiring and the base substrate.

Abstract: A method for manufacturing a ferroelectric capacitor includes the steps of: forming a base dielectric film on a substrate, and forming a first plug conductive section in the base dielectric film at a predetermined position; forming, on the base dielectric film, a charge storage section formed from a lower electrode, a ferroelectric film and an upper electrode; forming a stopper film from an insulation material that covers the charge storage section; forming a hydrogen barrier film that covers the stopper film; forming an interlayer dielectric film on the base dielectric film including the hydrogen barrier film; forming, in the interlayer dielectric film, a first contact hole that exposes the first plug conductive section; forming a second contact hole that exposes the upper electrode of the charge storage section by successively etching the interlayer dielectric film, the hydrogen barrier film and the stopper film by using a resist pattern as a mask, and then removing the resist pattern by a wet cleaning trea

Abstract: A method for manufacturing a semiconductor device, includes: mounting a semiconductor chip having an electrode on a wiring substrate having a base substrate and a wiring formed on the base substrate; forming a eutectic alloy by contacting the wiring with the electrode and by heating and pressurizing, and; forming the eutectic alloy so as a part of the eutectic alloy enters between the wiring and the base substrate.

Abstract: A method for manufacturing a semiconductor device, includes: mounting a semiconductor chip having an electrode on a wiring substrate having a base substrate and a wiring formed on the base substrate; forming a eutectic alloy by contacting the wiring with the electrode and by heating and pressurizing, and; forming the eutectic alloy so as a part of the eutectic alloy enters between the wiring and the base substrate.

Abstract: A method for manufacturing a ferroelectric capacitor includes the steps of: forming a base dielectric film on a substrate, and forming a first plug conductive section in the base dielectric film at a predetermined position; forming, on the base dielectric film, a charge storage section formed from a lower electrode, a ferroelectric film and an upper electrode; forming a stopper film from an insulation material that covers the charge storage section; forming a hydrogen barrier film that covers the stopper film; forming an interlayer dielectric film on the base dielectric film including the hydrogen barrier film; forming, in the interlayer dielectric film, a first contact hole that exposes the first plug conductive section; forming a second contact hole that exposes the upper electrode of the charge storage section by successively etching the interlayer dielectric film, the hydrogen barrier film and the stopper film by using a resist pattern as a mask, and then removing the resist pattern by a wet cleaning trea

Abstract: A semiconductor device is provided having: a board; a metallization pattern formed on the first face of the board; a first layer formed so as to not cover the first portion of the metallization pattern but to cover the second portion; and a semiconductor chip mounted on the first face of the board and electrically connected with the metallization pattern in the first portion. A resin portion is provided between the semiconductor chip and the board and from there onto the first portion of the metallization pattern outside the semiconductor chip so as to not reach a boundary between the first and second portions. A second layer is provided on the second face of the board so as to overlap the boundary of the metallization pattern and not overlap the resin portion.

Abstract: A method for manufacturing a semiconductor device, includes: mounting a semiconductor chip having an electrode on a wiring substrate having a base substrate and a wiring formed on the base substrate; forming a eutectic alloy by contacting the wiring with the electrode and by heating and pressurizing, and; forming the eutectic alloy so as a part of the eutectic alloy enters between the wiring and the base substrate.

Abstract: A semiconductor chip is mounted on the substrate so that the first group of electrodes faces the first group of leads and the second group of electrodes faces the second group of leads. The first group of leads extends in a direction away from the second group of electrodes. Each of the second group of leads extends so as to pass between the first group of electrodes and is formed to be bent in the region between first and second straight lines.

Abstract: A semiconductor device includes a substrate on which are formed a first group and a second group of leads; and a semiconductor chip having a first group and a second group of electrodes, the first group and a second group of electrodes being arranged respectively on both sides of a region between first and second straight lines, the first and second straight lines being parallel to each other. The semiconductor chip is mounted on the substrate so that the first group of electrodes faces the first group of leads and the second group of electrodes faces the second group of leads. Each of the second group of leads has a bent portion, the bent portion being formed so that a contour of an inner side of each bend of the bent portion draws a curve.

Abstract: A plurality of leads includes a plurality of lead groups, each of which are formed of at least two first leads, and a plurality of second leads. Each of the second leads is positioned between an adjacent pair of the lead groups. Each of an outermost pair of the first leads of each of the lead groups includes a first portion and a second portion, the first portion of each of the outermost pair of the first leads being positioned at a first spacing apart and the second portion of each of the outermost pair of the first leads being positioned at a second spacing apart which is smaller than the first spacing. Each of the second leads is disposed in a manner to avoid a region that is sandwiched between the first portion of each of the adjacent pair of the lead groups and has a portion that is disposed in a region that is sandwiched between the second portion of each of the adjacent pair of the lead groups.

Abstract: A semiconductor device comprises; a semiconductor chip including a first and second groups of pads; and a wiring substrate including a first and second groups of leads, wherein the first group pads are arranged in line with a first line extending along one side of the semiconductor chip; the second group pads are arranged in line with a second line located the further inside of the semiconductor chip more than the location of first line and extending along one side of the semiconductor chip; and each of a first and second groups of leads includes a joint part, a bending part extended to the joint part and an end part extended to the bending part; wherein the semiconductor chip is mounted on the substrate such that the first group pads oppose the joint parts of the first group leads and the second group pads oppose the joint parts of the second group leads; the joint parts of the first group leads extend along any of a plural of lines passing through a first point; the joint parts of the second group leads ext

Abstract: A plurality of leads includes a plurality of lead groups, each of which are formed of at least two first leads, and a plurality of second leads. Each of the second leads is positioned between an adjacent pair of the lead groups. Each of an outermost pair of the first leads of each of the lead groups includes a first portion and a second portion, the first portion of each of the outermost pair of the first leads being positioned at a first spacing apart and the second portion of each of the outermost pair of the first leads being positioned at a second spacing apart which is smaller than the first spacing. Each of the second leads is disposed in a manner to avoid a region that is sandwiched between the first portion of each of the adjacent pair of the lead groups and has a portion that is disposed in a region that is sandwiched between the second portion of each of the adjacent pair of the lead groups.

Abstract: A semiconductor chip is mounted on the substrate so that the first group of electrodes faces the first group of leads and the second group of electrodes faces the second group of leads. The first group of leads extends in a direction away from the second group of electrodes. Each of the second group of leads extends so as to pass between the first group of electrodes and is formed to be bent in the region between first and second straight lines.

Abstract: A semiconductor device includes a substrate on which are formed a first group and a second group of leads; and a semiconductor chip having a first group and a second group of electrodes, the first group and a second group of electrodes being arranged respectively on both sides of a region between first and second straight lines, the first and second straight lines being parallel to each other. The semiconductor chip is mounted on the substrate so that the first group of electrodes faces the first group of leads and the second group of electrodes faces the second group of leads. Each of the second group of leads has a bent portion, the bent portion being formed so that a contour of an inner side of each bend of the bent portion draws a curve.

Abstract: A semiconductor device is provided. At least two second group electrodes are located in each of a plurality of regions partitioned by a plurality of second lines orthogonalized with a first line. Each of the regions is a region surrounded by a pair of the second lines contacting and sandwiching a pair of first group electrodes adjacent to each other. The thus formed semiconductor chip is mounted on a substrate such that the first group electrodes face leads of the first group and the second group electrodes face the leads of the second group. Each lead of the second group is located so as to go through the leads of the first group.

Abstract: A semiconductor device is provided having: a board; a metallization pattern formed on the first face of the board; a first layer formed so as to not cover the first portion of the metallization pattern but to cover the second portion; and a semiconductor chip mounted on the first face of the board and electrically connected with the metallization pattern in the first portion. A resin portion is provided between the semiconductor chip and the board and from there onto the first portion of the metallization pattern outside the semiconductor chip so as to not reach a boundary between the first and second portions. A second layer is provided on the second face of the board so as to overlap the boundary of the metallization pattern and not overlap the resin portion.

Abstract: A group III nitride semiconductor film involving few lattice defects and having a large thickness, and a process for making the film are disclosed. Dry-etching is conducted while a quartz substrate and a group III nitride semiconductor are placed on the top of a lower electrode. Nano-pillars (50) are formed on the top of the group III nitride semiconductor (101). Another group III nitride semiconductor film (51) is deposited on the nano-pillars (50).