Patents by Inventor Tatsuji Masuda

Tatsuji Masuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6239638
    Abstract: A SR flip-flop using a device which has negative resistance between two output electrodes provided on one of two semiconductor regions in a fixed reversible reverse breakdown condition of the semiconductor junction formed between the two semiconductor regions. The SR motion is controlled by applying trigger pulses directly to two output electrodes. In this manner, the circuit is simplified and the operation speed is raised.
    Type: Grant
    Filed: April 21, 1999
    Date of Patent: May 29, 2001
    Inventor: Tatsuji Masuda
  • Patent number: 5229636
    Abstract: An active semiconductor device having a negative resistance based upon a negative effective mass of carriers in the semiconductor. A PN junction formed between semiconductor regions of P and N conductivity types is biased in a constant steady state current condition of a fixed reversible break down in the reverse direction based on the avalanche phenomenon, then the carriers may have negative effective mass in all directions within the region in which the carriers moved out of the transition region and are not so many times scattered by the lattice. The negative resistance relying upon this condition can be directly obtained as output by providing two output electrodes on one of the surfaces of the two types of semiconductor regions which sandwich the PN junction.
    Type: Grant
    Filed: April 22, 1991
    Date of Patent: July 20, 1993
    Inventor: Tatsuji Masuda