Patents by Inventor Tatsuji Saitoh
Tatsuji Saitoh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8867010Abstract: A display panel has a plurality of gate terminals that are formed of a gate metal layer and a plurality of source terminals that are formed of a source metal layer, disposed alternately as seen in a plane. From each of the source terminals an intermediate region and a terminal region are provided with inorganic insulating film such that a source terminal lead formed of the source metal layer is covered therewith. The intermediate region is provided with organic insulating film such that the inorganic insulating film is covered therewith. The inorganic insulating film is smaller in thickness in the terminal region than in the intermediate region. The inorganic insulating film has an opening in the terminal region to expose at least a portion of a surface of the source terminal.Type: GrantFiled: July 7, 2011Date of Patent: October 21, 2014Assignee: Sharp Kabushiki KaishaInventors: Isao Ogasawara, Tatsuji Saitoh, Junichi Mori, Katsuya Ogawa, Kazunori Tanimoto
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Publication number: 20130335684Abstract: A functional panel (FP) includes a COM substrate (4) and an SEG substrate (3) that face each other. The functional panel (FP) is combined with a display panel (LP) via an adhesive. The COM substrate (4), which is provided farther from the display panel (LP) than the SEG substrate (3) is, has edges (E1, E2) that face each other. The SEG substrate (3), which is provided closer to the display panel (LP) than the COM substrate (4) is, has (i) an edge (E3) provided along and inside the edge (E1) when viewed from above and (ii) an edge (E4) provided along and inside the edge (E2) when viewed from above. This effectively prevents the occurrence of a defective external shape.Type: ApplicationFiled: January 18, 2012Publication date: December 19, 2013Inventors: Kazuhiro Yoshikawa, Kazunori Tanimoto, Masayuki Tsuji, Takayuki Hayano, Nobuhiro Nakata, Yoshihiro Asai, Masahiro Yoshida, Tatsuji Saitoh, Isao Ogasawara
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Publication number: 20130155345Abstract: A display panel has a plurality of gate terminals that are formed of a gate metal layer and a plurality of source terminals that are formed of a source metal layer, disposed alternately as seen in a plane. From each of the source terminals an intermediate region and a terminal region are provided with inorganic insulating film such that a source terminal lead formed of the source metal layer is covered therewith. The intermediate region is provided with organic insulating film such that the inorganic insulating film is covered therewith. The inorganic insulating film is smaller in thickness in the terminal region than in the intermediate region. The inorganic insulating film has an opening in the terminal region to expose at least a portion of a surface of the source terminal.Type: ApplicationFiled: July 7, 2011Publication date: June 20, 2013Applicant: Sharp Kabushiki KaishaInventors: Isao Ogasawara, Tatsuji Saitoh, Junichi Mori, Katsuya Ogawa, Kazunori Tanimoto
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Patent number: 8400597Abstract: Each of picture elements (14) has a plurality of alignment regions (R1, R2, R3, and R4), in each of which liquid crystal molecules contained in a liquid crystal layer are aligned in a direction that is different from those in the others of the plurality of alignment regions. Each of a plurality of scanning signal lines (32) and a border region (R11 and R12) between corresponding adjacent ones of the plurality of alignment regions (R1, R2, R3, and R4) at least partially overlap each other when viewed from above.Type: GrantFiled: March 27, 2009Date of Patent: March 19, 2013Assignee: Sharp Kabushiki KaishaInventors: Junichi Morinaga, Katsushige Asada, Masahiro Yoshida, Tetsuya Fujikawa, Katsuhiro Mikumo, Kuniko Maeno, Ryohki Itoh, Satoshi Horiuchi, Tatsuji Saitoh, Isao Ogasawara, Kazunori Tanimoto, Katsuhiro Okada, Toshiaki Fujihara, Masakatsu Tominaga
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Patent number: 8068130Abstract: An active matrix type display panel, used as a display-use panel, has pixel patterns each having aperture sections. The aperture sections are set to have a width satisfying the following inequality, 0<(minimum width of the aperture sections in the pixel)/(maximum width of the aperture sections in the pixel)?0.037, or 0.130?(minimum width of the aperture sections in the pixel)/(maximum width of the aperture sections in the pixel)<1.Type: GrantFiled: November 4, 2004Date of Patent: November 29, 2011Assignee: Sharp Kabushiki KaishaInventors: Sunao Aoki, Tatsuji Saitoh, Kenji Fujita, Toshihiro Matsumoto
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Publication number: 20110075087Abstract: Each of picture elements (14) has a plurality of alignment regions (R1, R2, R3, and R4), in each of which liquid crystal molecules contained in a liquid crystal layer are aligned in a direction that is different from those in the others of the plurality of alignment regions. Each of a plurality of scanning signal lines (32) and a border region (R11 and R12) between corresponding adjacent ones of the plurality of alignment regions (R1, R2, R3, and R4) at least partially overlap each other when viewed from above.Type: ApplicationFiled: March 27, 2009Publication date: March 31, 2011Inventors: Junichi Morinaga, Katsushige Asada, Masahiro Yoshida, Tetsuya Fujikawa, Katsuhiro Mikumo, Kuniko Maeno, Ryohki Itoh, Satoshi Horiuchi, Tatsuji Saitoh, Isao Ogasawara, Kazunori Tanimoto, Katsuhiro Okada, Toshiaki Fujihara, Masakatsu Tominaga
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Patent number: 7612834Abstract: A parallax barrier is manufactured by forming a light-blocking layer by patterning a metal layer or a resin layer on a barrier glass in a photolithography step. On a mask used in the photolithography step, some pitches between slits are different, the slits corresponding to portions whereupon the light-blocking layers are to be formed. In addition, on the mask, first pitches (for instance, 100) and second pitches (for instance 99.5), which can be actually formed with accuracy, are formed in a cycle, and the average of such pitches can be accord with a theoretical pitch distance (for instance, 99.99). Thus, in the parallax barrier to be used for a multiple display device, visibility of the entire screen can be improved, and the parallax barrier which can be manufactured by using the mask lithography technology having a limited accuracy, and a method for manufacturing such parallax barrier are provided.Type: GrantFiled: June 26, 2006Date of Patent: November 3, 2009Assignee: Sharp Kabushiki KaishaInventors: Kazunori Tanimoto, Tatsuji Saitoh
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Publication number: 20090080099Abstract: A parallax barrier is manufactured by forming a light-blocking layer by patterning a metal layer or a resin layer on a barrier glass in a photolithography step. On a mask used in the photolithography step, some pitches between slits are different, the slits corresponding to portions whereupon the light-blocking layers are to be formed. In addition, on the mask, first pitches (for instance, 100) and second pitches (for instance 99.5), which can be actually formed with accuracy, are formed in a cycle, and the average of such pitches can be accord with a theoretical pitch distance (for instance, 99.99). Thus, in the parallax barrier to be used for a multiple display device, visibility of the entire screen can be improved, and the parallax barrier which can be manufactured by using the mask lithography technology having a limited accuracy, and a method for manufacturing such parallax barrier are provided.Type: ApplicationFiled: June 26, 2006Publication date: March 26, 2009Applicant: Sharp Kabushiki KaishaInventors: Kazunori Tanimoto, Tatsuji Saitoh
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Publication number: 20060284972Abstract: An active matrix type display panel, used as a display-use panel, has pixel patterns each having aperture sections. The aperture sections are set to have a width satisfying the following inequality, 0<(minimum width of the aperture sections in the pixel)/(maximum width of the aperture sections in the pixel)?0.037, or 0.130?(minimum width of the aperture sections in the pixel)/(maximum width of the aperture sections in the pixel)<1.Type: ApplicationFiled: November 4, 2004Publication date: December 21, 2006Applicant: SHARP KABUSHIKI KAISHAInventors: Sunao Aoki, Tatsuji Saitoh, Kenji Fujita, Toshihiro Matsumoto