Patents by Inventor Tatsunori Koyanagi

Tatsunori Koyanagi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100051324
    Abstract: An aspect of the present invention comprises a method of forming holes in a dielectric substrate comprising the steps of applying a layer of photoresist to a dielectric substrate, exposing portions of the photoresist to actinic radiation through a photomask to form a pattern in the photoresist for an array of holes to be etched in the substrate, developing the photoresist, etching the dielectric substrate to form an array of holes, each hole extending at least partially through the dielectric substrate, and removing the excess photoresist. Another aspect of the present invention is a method of simultaneously forming holes in a dielectric substrate some of which extend partially through the substrate and some of which extend completely through the substrate. Other aspects of the present invention are dielectric substrates formed using the methods of the invention.
    Type: Application
    Filed: June 20, 2006
    Publication date: March 4, 2010
    Inventors: Vincent Yong Chin Lee, Yi Liang Fu, Tatsunori Koyanagi, Yoshiyuki Ohkura, Masahiko Ito
  • Patent number: 6803528
    Abstract: Disclosed herein are multi-layer double-sided wiring boards having an insulating layer with an opening, conductive layers on both surfaces of the insulating layer and on the inside of the opening, and an interface layer between the insulating layer and portions of the conductive layers wherein the conductive layers are in direct contact in the opening. Also disclosed are methods of fabricating such multi-layer double-sided wiring boards.
    Type: Grant
    Filed: March 26, 2002
    Date of Patent: October 12, 2004
    Assignee: 3M Innovative Properties Company
    Inventor: Tatsunori Koyanagi
  • Publication number: 20030039106
    Abstract: A double-sided wiring board provides an electric connection between two wiring layers with the use of a recess, thereby improving a reliability on electric connection more than the related art, and a manufacture therefor. The double-sided wiring board (100) has a recess (106) blocked at the side of a first face (101a) and opened to a second face (101b) of an insulator (101). A laser light is irradiated to a blockage part (1061) of the recess (106), whereby a rough exposed face (1031) without a foreign matter (107) remaining is formed to a first conductive layer (108). A second wiring layer (105) is formed to be connected to the exposed face (1031) and electrically connected to the first conductive layer (108). The first conductive layer (108) and the second wiring layer (105) are more tightly connected than in the related art through the connection at the exposed face (1031). Reliability of the electric connection between the wiring layers is improved in comparison with the related art.
    Type: Application
    Filed: September 19, 2002
    Publication date: February 27, 2003
    Inventors: Tatsunori Koyanagi, Yusuke Saito, Hideaki Yasui
  • Patent number: 5453913
    Abstract: A TAB tape having multiple metallic conductors arranged on the surface of a base film with substantially square device holes is formed with designed areas of stress refief formed by one or more slits and/or arrays of holes which extend outward from the corners or sides of the device holes, such that dimensional stability in the base film is improved in a direction parallel to inner leads when thermo-compression bonding is performed to connect the inner leads with IC chips resulting in improved connection reliability for connection between inner leads and IC chips.
    Type: Grant
    Filed: April 26, 1994
    Date of Patent: September 26, 1995
    Assignee: Minnesota Mining and Manufacturing Company
    Inventor: Tatsunori Koyanagi