Patents by Inventor Tatsunori YANAGIMOTO

Tatsunori YANAGIMOTO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240105667
    Abstract: An aluminum wire with which, at the time of bonding a bonding wire for a power semiconductor, the wire is not detached from a wedge tool, and a long life is achieved in a power cycle test. The aluminum wire is made of an aluminum alloy having an aluminum purity of 99 mass % or more and contains, relative to a total amount of all elements of the aluminum alloy, a total of 0.01 mass % or more and 1 mass % or less of iron and silicon. In a lateral cross-section in a direction perpendicular to a wire axis of the aluminum wire, an orientation index of is 1 or more, an orientation index of is 1 or less, and an area ratio of precipitated particles is in a range of 0.02% or more to 2% or less.
    Type: Application
    Filed: January 25, 2022
    Publication date: March 28, 2024
    Applicants: TANAKA DENSHI KOGYO K.K., MITSUBISHI ELECTRIC CORPORATION
    Inventors: Shuichi MITOMA, Tsukasa ICHIKAWA, Tsuyoshi URAJI, Tatsunori YANAGIMOTO, Dai NAKAJIMA
  • Publication number: 20230268239
    Abstract: The present disclosure has been conceived to solve such a problem, and it is an object of the present disclosure to provide a semiconductor device enabling reduction in cost. A semiconductor device according to the present disclosure includes: a base plate; an insulating substrate disposed over the base plate; a semiconductor chip disposed over the insulating substrate; a first resin case and a second resin case attached to the base plate to enclose the insulating substrate and the semiconductor chip, and fitted together; and a sealing material to seal the insulating substrate and the semiconductor chip, wherein the first resin case and the second resin case are formed of resin materials having different comparative tracking indices.
    Type: Application
    Filed: September 2, 2020
    Publication date: August 24, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yoichi HIRONAKA, Tatsunori YANAGIMOTO
  • Patent number: 11355477
    Abstract: There are provided a small-sized power semiconductor module and a small-sized power conversion device capable of reducing ringing voltage. A power semiconductor module includes: a positive electrode-side switching element and a positive electrode-side freewheeling diode corresponding to a positive electrode-side power semiconductor element; a negative electrode-side switching element and a negative electrode-side freewheeling diode corresponding to a negative electrode-side power semiconductor element; a positive electrode conductor pattern; a negative electrode conductor pattern; an AC electrode pattern; and a snubber substrate including an insulating substrate having a snubber circuit formed thereon. The snubber substrate includes the insulating substrate and the at least one snubber circuit arranged on the insulating substrate. The snubber substrate is arranged on at least one of the positive electrode conductor pattern, the negative electrode conductor pattern and the AC electrode pattern.
    Type: Grant
    Filed: February 2, 2018
    Date of Patent: June 7, 2022
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takeshi Horiguchi, Yuji Miyazaki, Tatsunori Yanagimoto
  • Patent number: 11152318
    Abstract: A semiconductor device of the present invention includes a first main electrode and a second main electrode respectively disposed on a first main surface and a second main surface of a semiconductor substrate, a protective film disposed on an edge part of the first main electrode; and a first metal film disposed in a region enclosed by the protective film on the first main electrode. The first metal film has a film thickness at a central portion larger than that at a part in contact with the protective film, and has irregularities on a surface thereof.
    Type: Grant
    Filed: November 21, 2018
    Date of Patent: October 19, 2021
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Tatsunori Yanagimoto, Kaori Sato, Masao Kikuchi
  • Publication number: 20200286864
    Abstract: There are provided a small-sized power semiconductor module and a small-sized power conversion device capable of reducing ringing voltage. A power semiconductor module includes: a positive electrode-side switching element and a positive electrode-side freewheeling diode corresponding to a positive electrode-side power semiconductor element; a negative electrode-side switching element and a negative electrode-side freewheeling diode corresponding to a negative electrode-side power semiconductor element; a positive electrode conductor pattern; a negative electrode conductor pattern; an AC electrode pattern; and a snubber substrate including an insulating substrate having a snubber circuit formed thereon. The snubber substrate includes the insulating substrate and the at least one snubber circuit arranged on the insulating substrate. The snubber substrate is arranged on at least one of the positive electrode conductor pattern, the negative electrode conductor pattern and the AC electrode pattern.
    Type: Application
    Filed: February 2, 2018
    Publication date: September 10, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takeshi HORIGUCHI, Yuji MIYAZAKI, Tatsunori YANAGIMOTO
  • Publication number: 20200258854
    Abstract: A semiconductor device of the present invention includes a first main electrode and a second main electrode respectively disposed on a first main surface and a second main surface of a semiconductor substrate, a protective film disposed on an edge part of the first main electrode; and a first metal film disposed in a region enclosed by the protective film on the first main electrode. The first metal film has a film thickness at a central portion larger than that at a part in contact with the protective film, and has irregularities on a surface thereof.
    Type: Application
    Filed: November 21, 2018
    Publication date: August 13, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Tatsunori YANAGIMOTO, Kaori SATO, Masao KIKUCHI
  • Publication number: 20180053737
    Abstract: In a power semiconductor device, a front-surface electrode of a power semiconductor element is formed in such a manner that, on a first Cu layer consisting mainly of Cu, formed by non-electrolytic plating and having a Vickers hardness of 200 to 350 Hv, a second Cu layer consisting mainly of Cu, formed by non-electrolytic plating and having a Vickers hardness of 70 to 150 Hv and thus being softer than the first Cu layer, is laminated. The second Cu layer and a wire made of Cu are wire-bonded together.
    Type: Application
    Filed: February 26, 2016
    Publication date: February 22, 2018
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Shohei OGAWA, Masao KIKUCHI, Junji FUJINO, Yoshihisa UCHIDA, Yuichiro SUZUKI, Tatsunori YANAGIMOTO
  • Patent number: 9818716
    Abstract: A power module is fabricated, employing a clad metal that is formed by pressure-laminating aluminum and copper, in such a manner that the aluminum layer of the clad metal is bonded such as by ultrasonic bonding to the surface electrode of the power semiconductor chip and a wire is bonded to the copper layer thereof to establish electrical circuit. The clad metal is thermally treated in advance at a temperature higher than the operating temperature of the power semiconductor chip to sufficiently form intermetallic compounds at the interface between the aluminum layer and the copper layer for the intermetallic compounds so as not to grow in thickness after the bonding processes.
    Type: Grant
    Filed: October 9, 2015
    Date of Patent: November 14, 2017
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Junji Fujino, Yoshihisa Uchida, Shohei Ogawa, Soichi Sakamoto, Tatsunori Yanagimoto
  • Publication number: 20170200691
    Abstract: A power module is fabricated, employing a clad metal that is formed by pressure-laminating aluminum and copper, in such a manner that the aluminum layer of the clad metal is bonded such as by ultrasonic bonding to the surface electrode of the power semiconductor chip and a wire is bonded to the copper layer thereof to establish electrical circuit. The clad metal is thermally treated in advance at a temperature higher than the operating temperature of the power semiconductor chip to sufficiently form intermetallic compounds at the interface between the aluminum layer and the copper layer for the intermetallic compounds so as not to grow in thickness after the bonding processes.
    Type: Application
    Filed: October 9, 2015
    Publication date: July 13, 2017
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Junji FUJINO, Yoshihisa UCHIDA, Shohei OGAWA, Soichi SAKAMOTO, Tatsunori YANAGIMOTO
  • Patent number: 9484294
    Abstract: A semiconductor device of the present invention includes a bonding target and an electrode terminal bonded to the bonding target. The electrode terminal and the bonding target are bonded by ultrasonic bonding at a bonding surface to be subjected to bonding. The electrode terminal includes a penetrating hollow part surrounded on at least two sides by the bonding surface.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: November 1, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yutaka Yoneda, Hidetoshi Ishibashi, Masao Kikuchi, Tatsunori Yanagimoto
  • Publication number: 20160133712
    Abstract: A semiconductor device of the present invention includes a bonding target and an electrode terminal bonded to the bonding target. The electrode terminal and the bonding target are bonded by ultrasonic bonding at a bonding surface to be subjected to bonding. The electrode terminal includes a penetrating hollow part surrounded on at least two sides by the bonding surface.
    Type: Application
    Filed: August 19, 2015
    Publication date: May 12, 2016
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yutaka YONEDA, Hidetoshi ISHIBASHI, Masao KIKUCHI, Tatsunori YANAGIMOTO
  • Publication number: 20150237718
    Abstract: A circuit board having a power semiconductor element mounted thereon includes an insulating plate, a bonding pattern, a circuit pattern, and a pad plate. The insulating plate is made of aluminum nitride ceramic and has a first surface and a second surface opposite to the first surface. The bonding pattern is bonded to the first surface of the insulating plate and made of any of aluminum and aluminum alloy. The circuit pattern is bonded to the second surface of the insulating plate and made of any of aluminum and aluminum alloy. The pad plate is bonded to the circuit pattern, only partially covers the circuit pattern, and is made of any of copper and copper alloy.
    Type: Application
    Filed: November 7, 2014
    Publication date: August 20, 2015
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yoshihiro YAMAGUCHI, Tatsunori YANAGIMOTO, Hidetoshi ISHIBASHI
  • Publication number: 20140151718
    Abstract: A semiconductor device according to the present invention includes a die pad, a semiconductor element joined to an upper surface of the die pad, and a resin sheet making close contact with a lower surface of the die pad, wherein the semiconductor element is resin-sealed together with the die pad and the resin sheet, wherein a recess is formed in the lower surface of the die pad, and a part of the resin sheet is filled into the recess bring the resin sheet into close contact with the lower surface of the die pad including an inside of the recess.
    Type: Application
    Filed: July 25, 2013
    Publication date: June 5, 2014
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Tatsunori YANAGIMOTO