Patents by Inventor Tatsuo Morimoto

Tatsuo Morimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7971159
    Abstract: To provide a data generating method, device, and program that can generate drawing data for drawing the entire general design graphic data with an accuracy of about 1 to 4 nm in a drawing method or a drawing system adapted to draw gradation-controllable spotlights in a two-dimensional array. The data generating method is a method for generating, in an exposure system having a function of irradiating multigradation-controllable spotlights in a two-dimensional array onto a photosensitive film on a substrate, gradation values of the spotlights based on design graphic data.
    Type: Grant
    Filed: April 7, 2006
    Date of Patent: June 28, 2011
    Assignees: Tohoko University, Kumamoto University
    Inventors: Yoshiyuki Taniguchi, Tatsuo Morimoto, Akira Nakada, Masae Nakada, legal representative, Tadahiro Ohmi
  • Publication number: 20090184288
    Abstract: A flocculant including, as a principal component, unit particles obtained by breaking down aggregates of mineral particles in a mineral raw material principally comprising fine particles of a hydrous aluminum silicate including soils or weathering products of rocks including volcanic eruptives
    Type: Application
    Filed: January 21, 2008
    Publication date: July 23, 2009
    Inventors: Shinichiro WADA, Tatsuo Morimoto, Ai Kuchibune
  • Patent number: 7424595
    Abstract: Configuration management information having circuit configuration information for altering a circuit configuration of an FPGA (12) is stored in a memory (13), the configuration management information according to information related to an instruction group, which is supplied by a configuration management unit (11) from the outside via a signal line group (14), is read from the memory (13), and the circuit configuration of the FPGA (12) is altered according to the read configuration management information to execute processing of the instruction group so that information processing by software is replaced by information processing by hardware in real time, which increases execution speed of information processing and shortens verification time of software, enabling software development in a shorter period and with higher efficiency.
    Type: Grant
    Filed: June 6, 2001
    Date of Patent: September 9, 2008
    Inventors: Tadahiro Ohmi, Tatsuo Morimoto, Akira Nakada, Shigetoshi Sugawa
  • Publication number: 20080189674
    Abstract: To provide a data generating method, device, and program that can generate drawing data for drawing the entire general design graphic data with an accuracy of about 1 to 4 nm in a drawing method or a drawing system adapted to draw gradation-controllable spotlights in a two-dimensional array. The data generating method is a method for generating, in an exposure system having a function of irradiating multigradation-controllable spotlights in a two-dimensional array onto a photosensitive film on a substrate, gradation values of the spotlights based on design graphic data.
    Type: Application
    Filed: April 7, 2006
    Publication date: August 7, 2008
    Inventors: Yoshiyuki Taniguchi, Tatsuo Morimoto, Akira Nakada, Masae Nakada, Tadahiro Ohmi
  • Publication number: 20060211249
    Abstract: Multilevel pattern registration is achieved by modifying the shape of an exposure pattern according to deviation of the shape of a microlithographically defined pattern due to distortion produced on a substrate. A substrate to be exposed is pretreated in a given manner. The substrate is photographed to obtain image data (1). Processing for extracting feature points is performed from the image data. Results of the extraction of feature points and design pattern data to be exposed are compared (2). Processing for detecting amounts of deviations is performed (3). Using results of the processing for detecting amounts of deviations, processing for modifying shapes of images in the design pattern data is performed (4). The images obtained by the results of the processing for modifying the shapes of the images are produced as an exposure pattern by an exposure image generator (5). The exposure pattern is exposed onto the exposed substrate (6).
    Type: Application
    Filed: December 2, 2003
    Publication date: September 21, 2006
    Applicant: Japan Science and Technology Agency
    Inventors: Akira Nakada, Kazumitsu Nakamura, Tatsuo Morimoto
  • Patent number: 6898310
    Abstract: An image signal processing method and system, which can greatly reduce the data size upon transmitting an image signal or storing the signal in a storage medium, and can obtain a high-quality image by preventing image quality after color processing from deteriorating. According to the method for processing an image signal output from an image sensing element, a compression step of compressing the image signal and an expansion step of expanding the compressed image signal are executed without executing color processing for executing at least white balance correction or correction, and the color processing is executed after completion of the compression and expansion steps, thereby preventing occurrence of block noise and high-frequency noise associated with compressing/expanding image data after the color processing of the image signal.
    Type: Grant
    Filed: June 30, 1999
    Date of Patent: May 24, 2005
    Inventors: Tadahiro Ohmi, Shigetoshi Sugawa, Isamu Ueno, Katsuhisa Ogawa, Toru Koizumi, Tetsunobu Kochi, Katsuhito Sakurai, Takahiro Nakayama, Tatsuo Morimoto
  • Publication number: 20030140222
    Abstract: Configuration management information having circuit configuration information for altering a circuit configuration of an FPGA (12) is stored in a memory (13), the configuration management information according to information related to an instruction group, which is supplied by a configuration management unit (11) from the outside via a signal line group (14), is read from the memory (13), and the circuit configuration of the FPGA (12) is altered according to the read configuration management information to execute processing of the instruction group so that information processing by software is replaced by information processing by hardware in real time, which increases execution speed of information processing and shortens verification time of software, enabling software development in a shorter period and with higher efficiency.
    Type: Application
    Filed: November 27, 2002
    Publication date: July 24, 2003
    Inventors: Tadahiro Ohmi, Tatsuo Morimoto, Akira Nakada, Shigetoshi Sugawa
  • Patent number: 6456992
    Abstract: A semiconductor arithmetic circuit which compares the magnitudes of a plurality of data with each other in real time by using a simple circuit. The semiconductor arithmetic circuit containing one or more neuron MOS transistors each having a plurality of input gate electrodes has an inverter circuit group of a plurality of inverter circuit each of which is constituted of neuron MOS transistors and a means for applying a prescribed signal voltage to at least one first input gate of the inverter circuit.
    Type: Grant
    Filed: November 7, 1997
    Date of Patent: September 24, 2002
    Inventors: Tadashi Shibata, Tadahiro Ohmi, Tatsuo Morimoto, Ryu Kaiwara
  • Patent number: 6334120
    Abstract: A semiconductor device capable of executing size comparison operations on a plurality of data at high speed and in real time and using simple circuitry. An inverter circuit group is used containing a plurality of inverter circuits constructed using neuron MOS transistors. Predetermined signal voltages are applied from the exterior to the first input gates of the inverter circuits, and the output signals of all inverters contained in the inverter circuit group are inputted into a first logical arithmetic circuit and a second logical arithmetic circuit, and the output signal of the first logical arithmetic circuit is inputted into a third logical arithmetic circuit controlled by the output signal of the second logical arithmetic circuit, and the output of the third logical arithmetic circuit is fed back to the second input gates of the inverter circuits contained in the inverter circuit group.
    Type: Grant
    Filed: March 13, 1998
    Date of Patent: December 25, 2001
    Inventors: Tadashi Shibata, Tadahiro Ohmi, Tatsuo Morimoto
  • Patent number: 6115725
    Abstract: The real time compression of moving images employing vector quantization is realized using simple hardware and with an optimal compression ratio with respect to the communication line capacity employed.
    Type: Grant
    Filed: January 28, 1998
    Date of Patent: September 5, 2000
    Assignees: Tadashi Shibata, Tadahiro Ohmi
    Inventors: Tadashi Shibata, Tadahiro Ohmi, Akira Nataka, Tatsuo Morimoto, Masahiro Konda
  • Patent number: 5926425
    Abstract: A memory which solves a problem of a conventional memory in that it was difficult for the conventional memory to shorten the fall time of its output signal without increasing its size. The number of paths is increased for discharging each of read bit lines by connecting to each of the read bit lines one or more additional transistors for discharging the read bit line, and by utilizing the transistors associated with other read bit line or lines to discharge the particular read bit line. The additional transistors can be provided between the existing transistors. This makes it possible to shorten the discharge time without increasing the size of the memory.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: July 20, 1999
    Assignees: Mitsubishi Electric Engineering Co., Ltd., Mitsubishi Denki Kabushiki Kaisha
    Inventor: Tatsuo Morimoto
  • Patent number: 5560993
    Abstract: A lanthanoid silicide-coated silicon carbide material whereof the surface is coated with a silicide, this silicide being a reaction product of an oxide of a lanthanoid rare earth element or yttrium with silicon carbide, or a reaction product of a compound oxide of a lanthanoid rare earth element or yttrium and silicon with silicon carbide; and a lanthanoid silicide-coated silicon carbide as above whereof the surface is further coated with an oxide of a lanthanoid rare earth element or yttrium, or with a compound oxide of a lanthanoid rare earth element or yttrium and silicon.
    Type: Grant
    Filed: February 15, 1995
    Date of Patent: October 1, 1996
    Assignee: Mitsubishi Jukogyo Kabushiki Kaisha
    Inventors: Tatsuo Morimoto, Yuzuru Ogura, Masayuki Kondo, Akira Notomi
  • Patent number: 5276232
    Abstract: The process of this invention produces high-octane gasoline blending stock advantageously by treating light hydrocarbons mainly comprising of paraffins and/or olefins having 2 to 7 carbon atoms at a hydrogen partial pressure of 5 kg/cm.sup.2 or less and at a temperature of 350.degree. to 650.degree. C. in the presence of a catalyst composition containing ammonia-modified crystalline aluminogallosilicates of high initial activity and long life obtained by contacting hydrogen type aluminogallosilicates with ammonia under a dry condition as catalyst component.
    Type: Grant
    Filed: April 16, 1993
    Date of Patent: January 4, 1994
    Assignee: Research Association For Utilization of Light Oil
    Inventors: Shinichi Inoue, Toshiji Makabe, Tatsuo Morimoto, Kazutomo Shimizu
  • Patent number: 4745979
    Abstract: This invention relates to a method and apparatus for simultaneously driving a plurality of drain boards, radially aligned about a common center, to stabilize and improve terrestrial and submarine foundation soils and submarine soils. This method, using standard width drain boards, can cover a wide absorption and drain area with a relatively small number of drain board driving operations.
    Type: Grant
    Filed: February 12, 1986
    Date of Patent: May 24, 1988
    Assignees: Kazuko Morimoto, Mayumi Morimoto, Kayoko Imajo
    Inventor: Tatsuo Morimoto
  • Patent number: 4559687
    Abstract: A method of manufacturing a nozzle for a combustor in, for example, a hydrogen producing plant. A mold is prepared from a material forming a nozzle body, and an alloy forming a covering layer is cast into the mold. The resulting combination of the material and the alloy is machined into a predetermined nozzle shape in which the covering layer covers the nose of the nozzle body.
    Type: Grant
    Filed: July 17, 1984
    Date of Patent: December 24, 1985
    Assignee: Mitsubishi Jukogyo Kabushiki Kaisha
    Inventors: Makato Tsunoi, Toshio Kai, Daisaku Shozen, Tatsuo Morimoto, Ikuo Inoue, Katsuo Jindo, Tetsuya Sato
  • Patent number: 4196102
    Abstract: This invention relates to a catalyst for hydrotreatment of hydrocarbons comprising one or more of metals selected from the group consisting of transition metals and metals of group IIb of the periodic table supported on sepiolite. More particularly it relates to a catalyst effective in the selective demetallization treatment of hydrocarbons.
    Type: Grant
    Filed: May 19, 1978
    Date of Patent: April 1, 1980
    Assignee: Chiyoda Chemical Engineering & Construction Co., Ltd.
    Inventors: Masayoshi Inooka, Motoyoshi Wakabayashi, Masatoshi Matsuda, Masaaki Kasuya, Yoshihoro Ohguchi, Munekazu Nakamura, Tatsuo Morimoto
  • Patent number: 4152250
    Abstract: This invention relates to a catalyst for hydrotreatment of hydrocarbons comprising one or more of metals selected from the group consisting of transition metals and metals of group IIb of the periodic table supported on sepiolite. More particularly it relates to a catalyst effective in the selective demetallization treatment of hydrocarbons.
    Type: Grant
    Filed: June 15, 1977
    Date of Patent: May 1, 1979
    Assignee: Chiyoda Chemical Engineering & Construction
    Inventors: Masayoshi Inooka, Motoyoshi Wakabayashi, Masatoshi Matsuda, Masaaki Kasuya, Yoshihiro Ohguchi, Munekazu Nakamura, Tatsuo Morimoto
  • Patent number: 4120780
    Abstract: A catalyst obtained by admixing red mud with alumina or/and an alumina-containing substance, optionally adjusting the water content of the admixture and/or adding an organic binder to the admixture, kneading and shaping the admixture into pellets having suitable size and shape, and calcining the pellets of 600.degree. C to 1,100.degree. C. The catalyst has a high compression strength and can, when used in the hydrodemetallization of hydrocarbons, achieve a high rate of demetallization and a low yield of low boiling fractions. The rate of demetallization is enhanced when the process is carried out using a hydrogen feed containing hydrogen sulfide.
    Type: Grant
    Filed: May 26, 1977
    Date of Patent: October 17, 1978
    Assignee: Chiyoda Chemical Engineering & Construction Co., Ltd.
    Inventors: Tatsuo Morimoto, Munekazu Nakamura, Masayoshi Inooka, Teizaburo Yawata
  • Patent number: 4075125
    Abstract: A catalyst obtained by admixing red mud with alumina or/and an alumina-containing substance, optionally adjusting the water content of the admixture and/or adding an organic binder to the admixture, kneading and shaping the admixture into pellets having suitable size and shape, and calcining the pellets at 600.degree. to 1,100.degree. C. The catalyst has a high compression strength and can, when used in the hydrodemetallization of hydrocarbons, achieve a high rate of demetallization and a low yield of low boiling fractions. The rate of demetallization is enhanced when the process is carried out using a hydrogen feed containing hydrogen sulfide.
    Type: Grant
    Filed: July 9, 1976
    Date of Patent: February 21, 1978
    Assignee: Chiyoda Chemical Engineering & Construction Co., Ltd.
    Inventors: Tatsuo Morimoto, Munekazu Nakamura, Masayoshi Inooka, Teizaburo Yawata
  • Patent number: RE31036
    Abstract: This invention relates to a catalyst for hydrotreatment of hydrocarbons comprising one or more of metals selected from the group consisting of transition metals and metals of group IIb of the periodic table supported on sepiolite. More particularly it relates to a catalyst effective in the selective demetallization treatment of hydrocarbons.
    Type: Grant
    Filed: November 25, 1980
    Date of Patent: September 21, 1982
    Assignee: Chiyoda Chemical Engineering and Construction Co., Ltd.
    Inventors: Masayoshi Inooka, Motoyoshi Wakabayashi, Masatoshi Matsuda, Masaaki Kasuya, Munekazu Nakamura, Tatsuo Morimoto