Patents by Inventor Tatsuo Sugimura

Tatsuo Sugimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4742517
    Abstract: In an interleaving circuit, writing and reading are executed on the two dimonsional array memory according to a first address sequence and a second address sequence, and product code errors occurring on the same column are propagated to the columns which are different with each other. The errors are thereby scattered to minimize the decreasing of the error correcting capability of the product codes.
    Type: Grant
    Filed: May 13, 1986
    Date of Patent: May 3, 1988
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yuji Takagi, Isao Satoh, Tatsuo Sugimura
  • Patent number: 4695993
    Abstract: An information recording and reproducing apparatus records and reproduces information in and from a recording medium including an information recording region divided into a plurality of sectors. In recording and reproducing information in and from the recording medium, each sector includes a sector address part formatted and a data recording part for recording data. A predetermined signal is overwritten in the address of a sector thereby making reproduction of the address impossible to prevent data from being recorded again by error in the sector containing data, while at the same time protecting the writing in the sectors.
    Type: Grant
    Filed: June 10, 1985
    Date of Patent: September 22, 1987
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yuuji Takagi, Isao Satoh, Tatsuo Sugimura