Patents by Inventor Tatsuya Enomoto

Tatsuya Enomoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240118127
    Abstract: The present disclosure is an optical line test system that detects a distribution of loss points of an optical line in a longitudinal direction, using a coherent light measurement device, applies vibration to facility disposed on a path of the optical line, detects a vibration point of the optical line in a longitudinal direction upon applying the vibration, using the coherent light measurement device, and identifies the loss point based on correspondence between the detected loss point and vibration point.
    Type: Application
    Filed: February 26, 2021
    Publication date: April 11, 2024
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Daisuke IIDA, Yoshitaka ENOMOTO, Chihiro KITO, Tatsuya OKAMOTO, Yusuke KOSHIKIYA, Yoshifumi WAKISAKA, Nazuki HONDA
  • Publication number: 20210214541
    Abstract: Described are a thermoplastic elastomer composition which includes components including a polar rubber having crosslinks and optionally an olefin polymer in a highly dispersed state relative to one another and which has excellent moldability, and a method for producing such compositions. The thermoplastic elastomer composition is obtained by dynamically heat treating a carbodiimide group-containing compound (A), an olefin polymer (B) having a group reactive with a carbodiimide group, a polar rubber (C), an optional olefin polymer (D), and a crosslinking agent (E) capable of crosslinking the polar rubber (C).
    Type: Application
    Filed: January 31, 2019
    Publication date: July 15, 2021
    Applicant: MITSUI CHEMICALS, INC.
    Inventor: Tatsuya ENOMOTO
  • Patent number: 10377889
    Abstract: A thermoplastic elastomer composition obtained by dynamically crosslinking an ethylene/?-olefin/non-conjugated polymer copolymer (A), a polyolefin resin (B), a softener (C) in an amount of 1 to 200 parts by mass per 100 parts by mass of the total of the copolymer (A) and the resin (B), and a crosslinking agent (D) by the use of a batch mixer under the conditions satisfying the requirements (1) to (4).
    Type: Grant
    Filed: March 23, 2016
    Date of Patent: August 13, 2019
    Assignee: MITSUI CHEMICALS, INC.
    Inventors: Hayato Kurita, Kazuyoshi Kaneko, Masahiro Enna, Tatsuya Enomoto, Hideki Mochizuki
  • Publication number: 20180072880
    Abstract: A thermoplastic elastomer composition obtained by dynamically crosslinking an ethylene/?-olefin/non-conjugated polymer copolymer (A), a polyolefin resin (B), a softener (C) in an amount of 1 to 200 parts by mass per 100 parts by mass of the total of the copolymer (A) and the resin (B), and a crosslinking agent (D) by the use of a batch mixer under the conditions satisfying the requirements (1) to (4).
    Type: Application
    Filed: March 23, 2016
    Publication date: March 15, 2018
    Applicant: MITSUI CHEMICALS, INC.
    Inventors: Hayato KURITA, Kazuyoshi KANEKO, Masahiro ENNA, Tatsuya ENOMOTO, Hideki MOCHIZUKI
  • Publication number: 20170283556
    Abstract: The present invention relates to a polyamide-based thermoplastic elastomer composition [Y] in which a rubber composition [X] and a phenol resin-based crosslinking agent [IV] are dynamically crosslinked, the rubber composition [X] comprising a polyamide [I] including 30 to 100% by mole of a terephthalic acid structural unit and having a melting point of 220 to 290° C.; an ethylene-?-olefin-unconjugated polyene copolymer rubber [II] including structural units of ethylene, an ?-olefin having 3 to 20 carbon atoms and an unconjugated polyene, respectively; and an olefin-based polymer [III] including 0.3 to 5.0% by mass of a functional group structural unit, (the total of [I] to [IV]: 100% by mass).
    Type: Application
    Filed: December 5, 2014
    Publication date: October 5, 2017
    Applicant: Mitsui Chemicals, Inc.
    Inventors: Hiroki EBATA, Tatsuya ENOMOTO, Isao WASHIO, Fumio KAGEYAMA, Atsushi TAKEISHI, Yuji ISHII, Akinori AMANO
  • Patent number: 8814278
    Abstract: When an inner ring of a driving-wheel supporting hub unit is fixed to a hub, a pressing die is displaced downward and an annular working surface at a lower end surface of the pressing die is pressed against a front end of a cylindrical portion over its whole periphery. Further, in this state, the pressing die is pressed downward toward the hub without rocking the pressing die relative to the hub. Thus, the cylindrical portion is plastically deformed radially outward along the working surface simultaneously over its whole periphery. By adopting this method, the operation of plastically deforming the cylindrical portion at the inner end of the hub to form a caulking portion, can be easily and performed accurately. Accordingly, the structure of the caulking portion forming apparatus can be simplified.
    Type: Grant
    Filed: March 29, 2007
    Date of Patent: August 26, 2014
    Assignee: NSK Ltd.
    Inventors: Tatsuya Enomoto, Nobuyuki Hagiwara, Masahiro Yasumura
  • Publication number: 20090045670
    Abstract: When an inner ring 3 of a driving-wheel supporting hub unit is fixed to a hub 2, a pressing die 24 is displaced downward and an annular working surface 27 at a lower end surface of the pressing die 24 is pressed against a front end of a cylindrical portion 13a over its whole periphery. Further, in this state, the pressing die 24 is pressed downward toward the hub 2 without rocking the pressing die 24 relative to the hub 2. Thus, the cylindrical portion 13a is plastically deformed radially outward along the working surface 27 simultaneously over its whole periphery. By adopting this method, the operation of plastically deforming the cylindrical portion 13a at the inner end of the hub 2 to form a caulking portion, can be easily and performed accurately. Accordingly, the structure of the caulking portion forming apparatus 21 can be simplified.
    Type: Application
    Filed: March 29, 2007
    Publication date: February 19, 2009
    Applicant: NSK LTD.
    Inventors: Tatsuya Enomoto, Nobuyuki Hagiwara, Masahiro Yasumura
  • Patent number: 5121474
    Abstract: A data processor in accordance with the present invention can normally operate bit-string data while avoiding a breakage of the data even in the case where a read-out area of the bit string and a write-in area thereof are overlapped by each other by providing an operation code of an instruction with an option designating the direction of bit processing.
    Type: Grant
    Filed: March 26, 1991
    Date of Patent: June 9, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Ken Sakamura, Toru Shimizu, Shunichi Iwata, Tatsuya Enomoto
  • Patent number: 4977497
    Abstract: A data processor in accordance with the present invention can normally operate bit-string data while avoiding a breakage of the data even in the case where a read-out area of the bit string and a write-in area thereof are overlapped each other by providing an operation code of an instruction with an option designating the direction of bit processing.
    Type: Grant
    Filed: October 10, 1989
    Date of Patent: December 11, 1990
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Ken Sakamura, Toru Shimizu, Shunichi Iwata, Tatsuya Enomoto
  • Patent number: 4780753
    Abstract: A semiconductor integrated circuit device with a complementary type internal logic function element used as a master slice type gate array LSI is disclosed having two transmission gates. A plurality of pairs of transistors are utilized with each pair comprising a first conductivity type transistor and a second conductivity type transistor. A first transmission gate is constructed with the first conductivity type transistor of one pair of transistors out of two pairs of these transistor pairs and the second conductivity type transistor of the other pair. Second transmission gate is constructed with the first conductivity type transistor of the other transistor pair and the second conductivity type transistor of the first transistor pair so that an area required for constructing the two transmission gates is reduced in order to increase the degree of integration.
    Type: Grant
    Filed: February 18, 1987
    Date of Patent: October 25, 1988
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Isao Ohkura, Shinichi Miyashima, Tatsuya Enomoto
  • Patent number: 4335505
    Abstract: A method for forming semiconductor memory devices each including either an MNOS-type or MOS-type transistor and an MNOS-type capacitor. Upon a silicon substrate there is formed a thick layer of oxide which defines the individual cells and provides separation therebetween. Exposed portions of the substrate are thermally oxidized to form a layer of thermal oxide upon which is subsequently deposited a layer of silicon nitride and a layer of polycrystalline silicon. The polycrystalline silicon is then masked and portions there are removed through apertures and the mask. The substrate is then irradiated at a non-perpendicular angle through the apertures in the mask and predetermined remaining portions of the layer of thermal oxide are removed. Exposed portions of the substrate at this point are diffused with an impurity of the opposite conductivity type to the substrate.
    Type: Grant
    Filed: December 26, 1979
    Date of Patent: June 22, 1982
    Assignee: VLSI Technology Research Association
    Inventors: Hiroshi Shibata, Tatsuya Enomoto
  • Patent number: 4322881
    Abstract: A method for producing semiconductor memory devices each including an MNOS-type transistor and an MNOS-type capacitor or an MOS-type transistor and an MNOS-type capacitor. A thick oxide layer is formed in predetermined patterns on the surface of the substrate so as to separate the memory cell areas. The surface of the wafer is then oxidized to form a thin oxide layer on which a layer of silicon nitride is deposited and over which a layer of polycrystalline silicon is formed. Portions of the layer of silicon nitride and layer of polycrystalline silicon are etched away in preferred patterns as are second portions of the layer of polycrystalline silicon to partially expose the layer of silicon nitride. Portions of the thin oxide layer are removed in areas where the second portions of the layer of polycrystalline silicon are etched away to thereby expose a first portion of the surface of the wafer. Following the diffusion of impurities into the wafer, a layer of thermal oxide is formed.
    Type: Grant
    Filed: December 26, 1979
    Date of Patent: April 6, 1982
    Assignee: VLSI Technology Research Association
    Inventors: Tatsuya Enomoto, Hiroshi Shibata