Abstract: The purpose of the present invention is to provide a methyl methacrylate-containing composition with high quality stability during storage. This can be solved with a methyl methacrylate-containing composition, a pyrazine compound represented by Formula (1) (component A1), and a polymerization inhibitor (Component B1), in which the concentration of methyl methacrylate is from 99 to 99.99% by mass.

Abstract: An image sensor includes a pixel array including multiple pixels. A lens is provided on an optical path of incident light to the image sensor. An actuator includes a coil, and supports positioning of the lens according to a driving signal applied to the coil. A position detection coil is arranged such that it magnetically couples with the coil of the actuator. An actuator driver supplies a pulse-shaped driving signal to the coil of the actuator driver. A position detection circuit generates a position detection signal that indicates the position of the lens based on an induced electromotive force that occurs in the position detection coil according to the driving signal, and feeds back the position detection signal to the actuator driver.

Abstract: An image sensor includes a pixel array including multiple pixels. A lens is provided on an optical path of incident light to the image sensor. An actuator includes a coil, and supports positioning of the lens according to a driving signal applied to the coil. A position detection coil is arranged such that it magnetically couples with the coil of the actuator. An actuator driver supplies a pulse-shaped driving signal to the coil of the actuator driver. A position detection circuit generates a position detection signal that indicates the position of the lens based on an induced electromotive force that occurs in the position detection coil according to the driving signal, and feeds back the position detection signal to the actuator driver.

Abstract: A camera module of the disclosure includes: an imaging unit that includes a plurality of pixels, acquires a first detection value in one of the pixels in a second term out of a first term, the second term, a third term, and a fourth term that are set in order, acquires a second detection value in the relevant one of the pixels in the fourth term, and obtains a pixel value of the relevant one of the pixels on the basis of a difference between the first and second detection values; a lens unit including a lens and an actuator that drives the lens; and a driver unit that generates a drive signal and drives the actuator using the drive signal, in which the drive signal makes a transition in each of the first and third terms.

Abstract: With a driving current as IDRV, with a reference voltage as VREF, and with a gain as k, a current detection circuit generates a detection voltage VS represented by VS=VREF+k×IDRV. An error amplifier amplifies a difference between the detection voltage VS and a control voltage that indicates a position of the VCM so as to generate an error voltage VERR. A first driver switches the driving current IDRV between a source current and a sink current with respect to one end of the coil according to the error voltage VERR. A second driver switches the driving current IDRV between a sink current and a source current with respect to the other end of the coil according to the error voltage VERR. The driving circuit allows an external circuit to set the level of the reference voltage VREF.

Abstract: A camera module of the disclosure includes: an imaging unit that includes a plurality of pixels, acquires a first detection value in one of the pixels in a second term out of a first term, the second term, a third term, and a fourth term that are set in order, acquires a second detection value in the relevant one of the pixels in the fourth term, and obtains a pixel value of the relevant one of the pixels on the basis of a difference between the first and second detection values; a lens unit including a lens and an actuator that drives the lens; and a driver unit that generates a drive signal and drives the actuator using the drive signal, in which the drive signal makes a transition in each of the first and third terms.

Abstract: A driving circuit for controlling a driving current is provided. A D/A converter has a precision of N bits and outputs a control signal for a driving current to a current driver. A logic unit receives input control data of M bits (M>N) and outputs intermediate control data of N bits to the D/A converter. A data extraction unit divides the input control data into a first data having N bits from the MSB and a second data having (M?N) bits from the LSB. A counter accumulatively adds the second data to generate a count. A carry detection unit asserts a carry signal when a carry at the MSB of the count is generated by the counter. An output control unit 66 converts the intermediate control data into the first data or a third data, in which 1 LSB is added to the first data, according to the carry signal.

Abstract: With a driving current as IDRV, with a reference voltage as VREF, and with a gain as k, a current detection circuit generates a detection voltage VS represented by VS=VREF+k×IDRV. An error amplifier amplifies a difference between the detection voltage VS and a control voltage that indicates a position of the VCM so as to generate an error voltage VERR. A first driver switches the driving current IDRV between a source current and a sink current with respect to one end of the coil according to the error voltage VERR. A second driver switches the driving current IDRV between a sink current and a source current with respect to the other end of the coil according to the error voltage VERR. The driving circuit allows an external circuit to set the level of the reference voltage VREF.

Abstract: A driving circuit for controlling a driving current is provided. A D/A converter has a precision of N bits and outputs a control signal for a driving current to a current driver. A logic unit receives input control data of M bits (M>N) and outputs intermediate control data of N bits to the D/A converter. A data extraction unit divides the input control data into a first data having N bits from the MSB and a second data having (M?N) bits from the LSB. A counter accumulatively adds the second data to generate a count. A carry detection unit asserts a carry signal when a carry at the MSB of the count is generated by the counter. An output control unit 66 converts the intermediate control data into the first data or a third data, in which 1 LSB is added to the first data, according to the carry signal.

Abstract: A driving circuit drives a voice coil motor having a spring return mechanism. A driving current generating unit supplies, to a coil of the voice coil motor, a driving current that corresponds to an analog control signal. Waveform memory stores digital waveform data which indicates the time waveform of a driving current to be supplied to the voice coil motor. A predetermined frequency component is removed from the frequency components of the waveform data. A control unit reads out the waveform data from the waveform memory at a rate that corresponds to the resonance frequency of the voice coil motor, and outputs the waveform data thus read out as a digital code. A D/A converter converts a digital code into an analog control signal, and outputs the analog control signal to the driving current generating unit.

Abstract: The present invention comprises a CHA 110 which transmits/receives data to/from an external device, a DKA 140 which transmits/receives data to/from an HDD unit 200, a primary cache unit 120 which has a primary cache memory 124, a secondary cache unit 130 which is installed between the primary cache unit 120 and the DKA 140 and has a secondary cache memory 134, a CCP 121 which stores write target data received by the CHA 110 in the primary cache memory 124, and a CCP 131 which stores the write target data in the secondary cache memory 134, and transfers the write target data stored in the secondary cache memory 134 to the DKA 140.

Abstract: A driving circuit drives a voice coil motor having a spring return mechanism. A driving current generating unit supplies, to a coil of the voice coil motor, a driving current that corresponds to an analog control signal. Waveform memory stores digital waveform data which indicates the time waveform of a driving current to be supplied to the voice coil motor. A predetermined frequency component is removed from the frequency components of the waveform data. A control unit reads out the waveform data from the waveform memory at a rate that corresponds to the resonance frequency of the voice coil motor, and outputs the waveform data thus read out as a digital code. A D/A converter converts a digital code into an analog control signal, and outputs the analog control signal to the driving current generating unit.

Abstract: The present invention comprises a CHA 110 which transmits/receives data to/from an external device, a DKA 140 which transmits/receives data to/from an HDD unit 200, a primary cache unit 120 which has a primary cache memory 124, a secondary cache unit 130 which is installed between the primary cache unit 120 and the DKA 140 and has a secondary cache memory 134, a CCP 121 which stores write target data received by the CHA 110 in the primary cache memory 124, and a CCP 131 which stores the write target data in the secondary cache memory 134, and transfers the write target data stored in the secondary cache memory 134 to the DKA 140.

Abstract: The present invention comprises a CHA 110 which transmits/receives data to/from an external device, a DKA 140 which transmits/receives data to/from an HDD unit 200, a primary cache unit 120 which has a primary cache memory 124, a secondary cache unit 130 which is installed between the primary cache unit 120 and the DKA 140 and has a secondary cache memory 134, a CCP 121 which stores write target data received by the CHA 110 in the primary cache memory 124, and a CCP 131 which stores the write target data in the secondary cache memory 134, and transfers the write target data stored in the secondary cache memory 134 to the DKA 140.

Abstract: The present invention comprises a CHA 110 which transmits/receives data to/from an external device, a DKA 140 which transmits/receives data to/from an HDD unit 200, a primary cache unit 120 which has a primary cache memory 124, a secondary cache unit 130 which is installed between the primary cache unit 120 and the DKA 140 and has a secondary cache memory 134, a CCP 121 which stores write target data received by the CHA 110 in the primary cache memory 124, and a CCP 131 which stores the write target data in the secondary cache memory 134, and transfers the write target data stored in the secondary cache memory 134 to the DKA 140.

Abstract: The present invention comprises a CHA 110 which transmits/receives data to/from an external device, a DKA 140 which transmits/receives data to/from an HDD unit 200, a primary cache unit 120 which has a primary cache memory 124, a secondary cache unit 130 which is installed between the primary cache unit 120 and the DKA 140 and has a secondary cache memory 134, a CCP 121 which stores write target data received by the CHA 110 in the primary cache memory 124, and a CCP 131 which stores the write target data in the secondary cache memory 134, and transfers the write target data stored in the secondary cache memory 134 to the DKA 140.