Patents by Inventor Tatsuya SUGIOKA

Tatsuya SUGIOKA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8964073
    Abstract: The present disclosure provides an image outputting apparatus, including, an image pickup section, an error correction code calculation section adapted to calculate an error correction code using pixel data, which configure an image obtained by image pickup by the image pickup section, as an information word, and an outputting section adapted to output coded data, which are data of a codeword obtained by adding the error correction code to the pixel data, to an image processing apparatus provided in an apparatus in which the image outputting apparatus is provided.
    Type: Grant
    Filed: October 20, 2011
    Date of Patent: February 24, 2015
    Assignee: Sony Corporation
    Inventors: Kazuhisa Funamoto, Tatsuo Shinbashi, Hideyuki Matsumoto, Hiroshi Shiroshita, Hiroki Kihara, Kenichi Maruko, Tatsuya Sugioka, Naohiro Koshisaka, Shigetoshi Sasaki, Masato Tamori, Takayuki Toyama, Miho Ozawa, Hayato Wakabayashi
  • Publication number: 20140300755
    Abstract: There is provided an information processing device including an acquirer that acquires second data obtained by converting first data constituted by bit data having a first number of bits into symbols having a second number of bits greater than the first number of bits, with respect to each of the bit data, a comparator that compares a first symbol string constituted by a plurality of symbols contained in the second data prior to reverse conversion of the acquired second data into the first data, to a second symbol string representing a code targeted for detection, and a detector that detects the first symbol string as the code targeted for detection from the second data, on the basis of the result of the comparison by the comparator.
    Type: Application
    Filed: November 30, 2012
    Publication date: October 9, 2014
    Inventors: Kazuhisa Funamoto, Tatsuo Shinbashi, Tatsuya Sugioka, Kenichi Maruko, Naohiro Koshisaka, Hiroo Takahashi
  • Patent number: 8812938
    Abstract: Disclosed herein is a coding apparatus, including: a calculation section adapted to calculate, based on information of a transmission object, a linear code to be used for error detection of the information; a production section adapted to produce coded data including a plurality of sets of the information and the linear code calculated by the calculation section; and a transmission section adapted to transmit the coded data to a reception apparatus.
    Type: Grant
    Filed: October 20, 2011
    Date of Patent: August 19, 2014
    Assignee: Sony Corporation
    Inventors: Naohiro Koshisaka, Tatsuo Shinbashi, Kazuhisa Funamoto, Hideyuki Matsumoto, Hiroshi Shiroshita, Kenichi Maruko, Tatsuya Sugioka
  • Patent number: 8713345
    Abstract: A local timing circuit receives a reference timing signal and generates a multi-phase timing signal for output to a digital signal processing circuit.
    Type: Grant
    Filed: January 26, 2011
    Date of Patent: April 29, 2014
    Assignee: Sony Corporation
    Inventor: Tatsuya Sugioka
  • Patent number: 8583985
    Abstract: A transmission apparatus, including an error correction code calculation section adapted to calculate an error correction code from data of a transmission object as an information word is disclosed. The transmission apparatus further includes a division section adapted to allocate coded data which configures a codeword obtained by adding the error correction code determined by the calculation by the error correction code calculation section to the data of the transmission object for each predetermined number of units to a plurality of transmission lines. The transmission apparatus further includes a plurality of transmission sections provided corresponding to the plural transmission lines and adapted to transmit the coded data allocated by the division section to a reception apparatus through the transmission lines.
    Type: Grant
    Filed: October 5, 2011
    Date of Patent: November 12, 2013
    Assignee: Sony Corporation
    Inventors: Tatsuo Shinbashi, Kazuhisa Funamoto, Hideyuki Matsumoto, Hiroshi Shiroshita, Kenichi Maruko, Tatsuya Sugioka, Naohiro Koshisaka
  • Patent number: 8467490
    Abstract: A communication system includes: a transmitter adapted to transmit a synchronizing clock and serial data synchronous with the synchronizing clock over a line at low amplitude; and a receiver adapted to receive the serial data and synchronizing clock from the transmitter. The receiver includes an amplifier adapted to amplify the received synchronizing clock of low amplitude to restore the clock to its original amplitude, a latched comparator adapted to latch the received serial data in synchronism with a reproduction clock, and a phase-locked circuit.
    Type: Grant
    Filed: March 11, 2009
    Date of Patent: June 18, 2013
    Assignee: Sony Corporation
    Inventors: Takaaki Yamada, Hiroki Kihara, Tatsuya Sugioka, Hisashi Owa, Taichi Niki, Yukio Shimomura
  • Publication number: 20120131422
    Abstract: A transmitting device includes a setting unit that sets the data length of an error correcting code whose data length is variable, an error correcting code calculator that calculates the error correcting code having the data length set by the setting unit for transmission-subject data as an information word, and a transmitting unit that transmits, to a receiving device existing in the same device, coded data that is data of a codeword obtained by adding the error correcting code obtained by calculation by the error correcting code calculator to the transmission-subject data.
    Type: Application
    Filed: September 28, 2011
    Publication date: May 24, 2012
    Applicant: Sony Corporation
    Inventors: Tatsuo SHINBASHI, Kazuhisa Funamoto, Hideyuki Matsumoto, Hiroshi Shiroshita, Kenichi Maruko, Tatsuya Sugioka, Naohiro Koshisaka, Shigetoshi Sasaki, Masato Tamori
  • Publication number: 20120131412
    Abstract: Disclosed herein is a transmission apparatus, including: an error correction code calculation section adapted to calculate an error correction code from data of a transmission object as an information word; a division section adapted to allocate coded data which configure a codeword obtained by adding the error correction code determined by the calculation by the error correction code calculation section to the data of the transmission object for each predetermined number of units to a plurality of transmission lines; and a plurality of transmission sections provided corresponding to the plural transmission lines and adapted to transmit the coded data allocated by the division section to a reception apparatus through the transmission lines.
    Type: Application
    Filed: October 5, 2011
    Publication date: May 24, 2012
    Applicant: Sony Corporation
    Inventors: Tatsuo SHINBASHI, Kazuhisa Funamoto, Hideyuki Matsumoto, Hiroshi Shiroshita, Kenichi Maruko, Tatsuya Sugioka, Naohiro Koshisaka
  • Publication number: 20120124455
    Abstract: Disclosed herein is a coding apparatus, including: a calculation section adapted to calculate, based on information of a transmission object, a linear code to be used for error detection of the information; a production section adapted to produce coded data including a plurality of sets of the information and the linear code calculated by the calculation section; and a transmission section adapted to transmit the coded data to a reception apparatus.
    Type: Application
    Filed: October 20, 2011
    Publication date: May 17, 2012
    Applicant: SONY CORPORATION
    Inventors: Naohiro Koshisaka, Tatsuo Shinbashi, Kazuhisa Funamoto, Hideyuki Matsumoto, Hiroshi Shiroshita, Kenichi Maruko, Tatsuya Sugioka
  • Publication number: 20120120289
    Abstract: An image outputting apparatus includes a header production section for producing a header including header information formed from first and second frame information regarding whether pixel data included in a payload are of first and last lines of one frame, respectively, first line information regarding whether or not the pixel data included in the payload are valid, and second line information regarding a line number of a line formed from the pixel data included in the payload, and an error detection code for use for detection of an error of the header information. A packet production section produces a packet which includes, in the payload thereof, pixel data for one line which configure an image obtained by imaging by an imaging section and to which the header is added. An outputting section outputs the produced packet to an image processing apparatus.
    Type: Application
    Filed: September 23, 2011
    Publication date: May 17, 2012
    Applicant: Sony Corporation
    Inventors: Tatsuya SUGIOKA, Hiroshi Shiroshita, Miho Ozawa, Hiroki Kihara, Kenichi Maruko, Tatsuo Shinbashi, Kazuhisa Funamoto, Hideyuki Matsumoto, Takayuki Toyama, Hayato Wakabayashi, Naohiro Koshisaka, Shigetoshi Sasaki, Masato Tamori
  • Publication number: 20120120287
    Abstract: The present disclosure provides an image outputting apparatus, including, an image pickup section, an error correction code calculation section adapted to calculate an error correction code using pixel data, which configure an image obtained by image pickup by the image pickup section, as an information word, and an outputting section adapted to output coded data, which are data of a codeword obtained by adding the error correction code to the pixel data, to an image processing apparatus provided in an apparatus in which the image outputting apparatus is provided.
    Type: Application
    Filed: October 20, 2011
    Publication date: May 17, 2012
    Applicant: Sony Corporation
    Inventors: Kazuhisa FUNAMOTO, Tatsuo Shinbashi, Hideyuki Matsumoto, Hiroshi Shiroshita, Hiroki Kihara, Kenichi Maruko, Tatsuya Sugioka, Naohiro Koshisaka, Shigetoshi Sasaki, Masato Tamori, Takayuki Toyama, Miho Ozawa, Hayato Wakabayashi
  • Publication number: 20110188619
    Abstract: A local timing circuit receives a reference timing signal and generates a multi-phase timing signal for output to a digital signal processing circuit.
    Type: Application
    Filed: January 26, 2011
    Publication date: August 4, 2011
    Applicant: Sony Corporation
    Inventor: Tatsuya Sugioka
  • Publication number: 20090232250
    Abstract: A communication system includes: a transmitter adapted to transmit a synchronizing clock and serial data synchronous with the synchronizing clock over a line at low amplitude; and a receiver adapted to receive the serial data and synchronizing clock from the transmitter. The receiver includes an amplifier adapted to amplify the received synchronizing clock of low amplitude to restore the clock to its original amplitude, a latched comparator adapted to latch the received serial data in synchronism with a reproduction clock, and a phase-locked circuit.
    Type: Application
    Filed: March 11, 2009
    Publication date: September 17, 2009
    Inventors: Takaaki YAMADA, Hiroki KIHARA, Tatsuya SUGIOKA, Hisashi OWA, Taichi NIKI, Yukio SHIMOMURA