Patents by Inventor Taylor GAINES

Taylor GAINES has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11881440
    Abstract: Microelectronic devices, assemblies, and systems include a microelectronic die and composite material to conduct heat from the microelectronic die such that the composite material includes polymer chains chemically bonded to fill particles having a hexagonal lattice of carbon atoms such as graphene sheet fill particles and/or carbon nanotube fill particles.
    Type: Grant
    Filed: February 21, 2020
    Date of Patent: January 23, 2024
    Assignee: Intel Corporation
    Inventors: Marely E. Tejeda Ferrari, Taylor Gaines, Elah Bozorg-Grayeli, James C. Matayabas, Jr.
  • Patent number: 11842944
    Abstract: An integrated circuit (IC) assembly comprising an IC die and a frame material that has been dispensed over the assembly substrate to be further adjacent to a perimeter edge of the IC die. The frame material may be selected to have flow properties that minimize slump, for example so a profile of a transverse cross-section through the frame material may retain convex curvature. The frame material may be cured following dispense, and upon application of a thermal interface material (TIM), the frame material may and act as a barrier, impeding flow of the TIM. The frame material may be compressed by force applied through an external thermal solution, such as a heat sink, to ensure good contact to the TIM.
    Type: Grant
    Filed: December 26, 2019
    Date of Patent: December 12, 2023
    Assignee: Intel Corporation
    Inventors: Kyle Arrington, Frederick Atadana, Taylor Gaines, Minseok Ha
  • Patent number: 11676876
    Abstract: A device is disclosed. The device includes a first die, a plurality of chiplets above the first die, a first underfill material beneath the chiplets, and a gap fill material between the chiplets. The gap fill material is different from the first underfill material. An interface region is formed between the first underfill material and the gap fill material.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: June 13, 2023
    Assignee: Intel Corporation
    Inventors: Ziyin Lin, Elizabeth Nofen, Vipul Mehta, Taylor Gaines
  • Publication number: 20210375719
    Abstract: A semiconductor device that has a semiconductor die coupled to a substrate. A mold compound encapsulates the semiconductor die, and at least one thermal conductive material section extends from adjacent the semiconductor die through the mold compound. The at least one conductive material section thus conveys heat from the semiconductor die through the mold compound.
    Type: Application
    Filed: August 11, 2021
    Publication date: December 2, 2021
    Inventors: Feras Eid, Shrenik Kothari, Chandra M. Jha, Johanna M. Swan, Michael J. Baker, Shawna M. Liff, Thomas L. Sounart, Betsegaw K. Gebrehiwot, Shankar Devasenathipathy, Taylor Gaines, Digvijay Ashokkumar Raorane
  • Publication number: 20210265238
    Abstract: Microelectronic devices, assemblies, and systems include a microelectronic die and composite material to conduct heat from the microelectronic die such that the composite material includes polymer chains chemically bonded to fill particles having a hexagonal lattice of carbon atoms such as graphene sheet fill particles and/or carbon nanotube fill particles.
    Type: Application
    Filed: February 21, 2020
    Publication date: August 26, 2021
    Applicant: INTEL CORPORATION
    Inventors: Marely E. Tejeda Ferrari, Taylor Gaines, Elah Bozorg-Grayeli, James C. Matayabas, JR.
  • Publication number: 20210202348
    Abstract: An integrated circuit (IC) assembly comprising an IC die and a frame material that has been dispensed over the assembly substrate to be further adjacent to a perimeter edge of the IC die. The frame material may be selected to have flow properties that minimize slump, for example so a profile of a transverse cross-section through the frame material may retain convex curvature. The frame material may be cured following dispense, and upon application of a thermal interface material (TIM), the frame material may and act as a barrier, impeding flow of the TIM. The frame material may be compressed by force applied through an external thermal solution, such as a heat sink, to ensure good contact to the TIM.
    Type: Application
    Filed: December 26, 2019
    Publication date: July 1, 2021
    Applicant: Intel Corporation
    Inventors: Kyle Arrington, Frederick Atadana, Taylor Gaines, Minseok Ha
  • Publication number: 20210066152
    Abstract: A device is disclosed. The device includes a first die, a plurality of chiplets above the first die, a first underfill material beneath the chiplets, and a gap fill material between the chiplets. The gap fill material is different from the first underfill material.
    Type: Application
    Filed: August 30, 2019
    Publication date: March 4, 2021
    Inventors: Ziyin LIN, Elizabeth NOFEN, Vipul MEHTA, Taylor GAINES
  • Publication number: 20200388576
    Abstract: Embodiments herein relate to systems, apparatuses, or processes for a layer for etched identification marks on a package. Embodiments include applying a layer to a side of a package, and laser etching the layer with an identification mark associated with the package to provide a visible identification on the package. In particular, the layer may be an EMI shielding layer of film laminate applied to the side of the package to protect the package from EMI or to protect surrounding components from EMI generated by the package. A laser or some other etching technique may then be performed on the layer to make a visible identification on the package.
    Type: Application
    Filed: June 10, 2019
    Publication date: December 10, 2020
    Inventors: Taylor GAINES, Kosuke HIROTA, Yoshihiro TOMITA, Jimin YAO
  • Publication number: 20200005983
    Abstract: Embodiments herein relate to a magnetic encapsulant composite, comprising a mixture of a first material that is a soft magnetic filler, a second material that is a polymer matrix, and a third material that is a process ingredient. The magnetic encapsulant composite may then encapsulate or partially encapsulate a magnetic inductor coupled to a substrate to increase the inductance of the magnetic inductor and/or to strengthen the substrate to which the magnetic inductor and the composite are coupled.
    Type: Application
    Filed: June 29, 2018
    Publication date: January 2, 2020
    Inventors: Malavarayan SANKARASUBRAMANIAN, Yongki MIN, Anne AUGUSTINE, Kaladhar RADHAKRISHNAN, Taylor GAINES, Ziyin LIN
  • Publication number: 20200006169
    Abstract: A structure including a barrier is described. In embodiments, a micro-electronic component may have a first face and a second face, wherein the second face includes interconnect structures and is opposite the first face. A fill material, such as a capillary underfill material (CUF), may fill a gap between the micro-electronic component and the substrate and substantially surround the interconnect structures. In embodiments, a barrier structure may be located on the surface of the substrate and along a perimeter or outside perimeter of the micro-electronic component, wherein a height of the barrier structure exceeds a height of the fill material in at least a portion of an open region of the substrate to confine the fill material to an area bordered by the barrier structure.
    Type: Application
    Filed: June 28, 2018
    Publication date: January 2, 2020
    Inventors: William WARREN, Taylor GAINES, Frederick ATADANA, Edvin CETEGEN, Vipul MEHTA, Hsin-Yu LI, Yuying WEI, Yang GUO, Ren ZHANG
  • Publication number: 20190214328
    Abstract: A semiconductor device that has a semiconductor die coupled to a substrate. A mold compound encapsulates the semiconductor die, and at least one thermal conductive material section extends from adjacent the semiconductor die through the mold compound. The at least one conductive material section thus conveys heat from the semiconductor die through the mold compound.
    Type: Application
    Filed: January 10, 2018
    Publication date: July 11, 2019
    Inventors: Feras Eid, Shrenik Kothari, Chandra M. Jha, Johanna M. Swan, Michael J. Baker, Shawna M. Liff, Thomas L. Sounart, Betsegaw K. Gebrehiwot, Shankar Devasenathipathy, Taylor Gaines, Digvijay Ashokkumar Raorane
  • Publication number: 20190206753
    Abstract: Embodiments include semiconductor packages and a method of forming the semiconductor packages. A semiconductor package including a die on a substrate, where the die has a front side surface electrically coupled to the substrate and a backside surface that is opposite from the front side surface. The semiconductor package also has a bicontinuous ceramic composite (BCC) stiffener on the backside surface of the die. The BCC stiffener may include one or more materials, including porous ceramics, polymeric resins, and metals. The BCC stiffener may be directly coupled to the backside surface of the die without an adhesive layer. The BCC stiffener may be disposed on the die to reduce warpage based on the substrate and die. The semiconductor package may have the BCC stiffener formed with the one or more materials using a polymeric resin in a liquid state process and a resin pre-loaded in a ceramic process.
    Type: Application
    Filed: December 30, 2017
    Publication date: July 4, 2019
    Inventors: Taylor GAINES, Mohit MAMODIA, Paul START, Ken HACKENBERG
  • Publication number: 20190202136
    Abstract: Apparatuses, systems and methods associated with procedures and adhesive elements for affixing components together are disclosed herein. In embodiments, an assembly may include a first component and a second component coupled to the first component. The assembly may further include a plurality of adhesive elements located between the first component and the second component, wherein the plurality of adhesive elements couple the second component to the first component, and wherein each adhesive element of the plurality of adhesive elements is equidistance from adjacent adhesive elements of the plurality of adhesive elements. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: December 29, 2017
    Publication date: July 4, 2019
    Inventors: Taylor GAINES, Mark SALTAS, Amram EITAN
  • Publication number: 20180342463
    Abstract: In various embodiments this disclosure is directed to conductive adhesives layers that can be used, in one example embodiment, to connect one or more shielding structures (for example, metal cans and/or covers) to a semiconductor package to enclose one or more electronic components on the semiconductor package. In another embodiment, the conductive adhesive layers disclosed herein can be used in connection with optoelectronic devices (for example, optoelectronic devices including laser diodes and/or avalanche photodiodes, APDs). In one embodiment, the conductive adhesives can additionally be used for thermal dissipation and for electrical contact in connection with one or more electronic components on a semiconductor package. In one embodiment, various materials including, spray prints, conductive paste, inks (for example, sintering silver-based materials), epoxy material (for example, epoxy materials filled with silver and/or other metal particles) can be used to provide a conductive adhesive layer.
    Type: Application
    Filed: July 13, 2018
    Publication date: November 29, 2018
    Inventors: Taylor GAINES, Anna M. PRAKASH, Suriyakala RAMALINGAM, Boxi LIU, Mohit GUPTA, Ziv BELMAN, Baruch SCHIFFMANN, Arnon HIRSHBERG, Vladimir MALAMUD, Ron WITTENBERG
  • Publication number: 20180235075
    Abstract: Semiconductor packages may include different portions associated one or more electronic components of the semiconductor package where electromagnetic (for example, radio-frequency, RF) shielding at predetermined frequencies ranges may be needed. Accordingly, in an embodiment, compartmental shielding can be used in the areas between the electronic components on the semiconductor package to provide RF shielding to the electronic components on the semiconductor package or to other electronic components in proximity to the electronic components on the semiconductor package. Further, in another embodiment, conformal coating shielding can be used to provide RF shielding to provide RF shielding to the electronic components on the semiconductor package or to other electronic components in proximity to the electronic components on the semiconductor package.
    Type: Application
    Filed: February 16, 2017
    Publication date: August 16, 2018
    Inventors: Taylor Gaines, Anna M. Prakash, Ziv Belman, Baruch Schiffmann, Arnon Hirshberg, Ron Wittenberg, Vladimir Malamud
  • Publication number: 20180190593
    Abstract: In various embodiments this disclosure is directed to conductive adhesives layers that can be used, in one example embodiment, to connect one or more shielding structures (for example, metal cans and/or covers) to a semiconductor package to enclose one or more electronic components on the semiconductor package. In another embodiment, the conductive adhesive layers disclosed herein can be used in connection with optoelectronic devices (for example, optoelectronic devices including laser diodes and/or avalanche photodiodes, APDs). In one embodiment, the conductive adhesives can additionally be used for thermal dissipation and for electrical contact in connection with one or more electronic components on a semiconductor package. In one embodiment, various materials including, spray prints, conductive paste, inks (for example, sintering silver-based materials), epoxy material (for example, epoxy materials filled with silver and/or other metal particles) can be used to provide a conductive adhesive layer.
    Type: Application
    Filed: December 30, 2016
    Publication date: July 5, 2018
    Inventors: Taylor GAINES, Anna M. PRAKASH, Suriyakala RAMALINGAM, Boxi LIU, Mohit GUPTA, Ziv BELMAN, Baruch SCHIFFMANN, Arnon HIRSHBERG, Vladimir MALAMUD, Ron WITTENBERG