Patents by Inventor Teck Sim Lee

Teck Sim Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160365296
    Abstract: A device includes an encapsulation material and a first lead and a second lead protruding out of a surface of the encapsulation material. A recess extends into the surface of the encapsulation material. An elevation is arranged on the surface of the encapsulation material. The first lead protrudes out of the elevation.
    Type: Application
    Filed: June 8, 2016
    Publication date: December 15, 2016
    Inventors: Ralf Otremba, Edward Fuergut, Christian Kasztelan, Hsieh Ting Kuek, Teck Sim Lee, Sanjay Kumar Murugan, Lee Shuang Wang
  • Publication number: 20160233149
    Abstract: A semiconductor chip package includes a semiconductor chip, an encapsulation body encapsulating the semiconductor chip, a chip pad, and electrical contact elements connected with the semiconductor chip and extending outwardly. The encapsulation body has six side faces and the electrical contact elements extend exclusively through two opposing side faces which have the smallest surface areas from all the side faces. The semiconductor chip is disposed on the chip pad, and a main face of the chip pad remote from the semiconductor chip is at least partially exposed to the outside.
    Type: Application
    Filed: February 4, 2016
    Publication date: August 11, 2016
    Inventors: Ralf Otremba, Chooi Mei Chong, Raynold Talavera Corocotchia, Teck Sim Lee, Sanjay Kumar Murugan, Klaus Schiess, Chee Voon Tan, Wee Boon Tay
  • Patent number: 9373566
    Abstract: In an embodiment an electronic component includes a semiconductor die having a first surface, the first surface including a first current electrode and a control electrode. The electronic component further includes a die pad having a first surface, a plurality of leads and a gull-wing shaped conductive element coupled to a first lead of the plurality of leads. The first current electrode is mounted on the die pad and the gull-wing shaped conductive element is coupled between the control electrode and the first lead.
    Type: Grant
    Filed: March 19, 2014
    Date of Patent: June 21, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Ralf Otremba, Klaus Schiess, Teck Sim Lee
  • Patent number: 9324642
    Abstract: A lead frame strip includes a plurality of connected unit lead frames, each unit lead frame having a die paddle and a plurality of leads connected to a periphery of the unit lead frame. A semiconductor die is attached to the die paddles. A molding compound covers the unit lead frames, including the semiconductor dies. Prior to testing or other processing of the lead frame strip, a gap is etched into a region of the leads which are shared by adjacent ones of the unit lead frames. The gap extends at least mostly through the shared leads. A partial cut is made in the molding compound around the periphery of the unit lead frames prior to the subsequent processing, including below the gap in the shared leads, to electrically isolate the leads of the unit lead frames.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: April 26, 2016
    Assignee: Infineon Technologies AG
    Inventors: Frank Püschner, Bernhard Schätzler, Teck Sim Lee, Franz Gabler, Pei Pei Kong, Boon Huat Lim
  • Publication number: 20160056092
    Abstract: A hybrid leadframe is provided comprising a thin leadframe layer comprising a diepad and a structured region; and a metal layer being thicker than the thin leadframe layer and arranged on the diepad.
    Type: Application
    Filed: August 19, 2015
    Publication date: February 25, 2016
    Inventors: Ralf OTREMBA, Chooi Mei CHONG, Josef HOEGLAUER, Teck Sim LEE, Klaus SCHIESS, Xaver SCHLOEGEL
  • Patent number: 9263563
    Abstract: In an embodiment, a semiconductor device package includes a bidirectional switch circuit. The bidirectional switch circuit includes a first semiconductor transistor mounted on a first die pad, a second semiconductor transistor mounted on a second die pad, the second die pad being separate from the first die pad, and a conductive connector extending between a source electrode of the first transistor and a source electrode of the second transistor.
    Type: Grant
    Filed: October 31, 2013
    Date of Patent: February 16, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Ralf Otremba, Fabio Brucchi, Franz Stückler, Teck Sim Lee
  • Patent number: 9230880
    Abstract: An electronic device includes a semiconductor chip including an electrode, a substrate element and a contact element connecting the electrode to the substrate element. The electronic device further includes an encapsulant configured to leave the contact element at least partially exposed such that a heatsink may be connected to the contact element.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: January 5, 2016
    Assignee: Infineon Technolgies AG
    Inventors: Ralf Otremba, Josef Hoeglauer, Juergen Schredl, Teck Sim Lee, Xaver Schloegel, Klaus Schiess
  • Publication number: 20150270208
    Abstract: A power semiconductor device is provided. The power semiconductor device includes a leadframe, which includes a first chip carrier part and at least one second chip carrier part, which are fitted at a distance from one another and are in each case electrically conductive, at least one first power semiconductor component applied on the first chip carrier part, at least one second power semiconductor component applied on the second chip carrier part, external contacts in the form of external leads, and a capacitor. The capacitor is mounted on two adjacent external leads.
    Type: Application
    Filed: March 18, 2015
    Publication date: September 24, 2015
    Inventors: Ralf OTREMBA, Fabio BRUCCHI, Teck Sim LEE, Xaver SCHLOEGEL, Franz STUECKLER
  • Publication number: 20150270194
    Abstract: In an embodiment an electronic component includes a semiconductor die having a first surface, the first surface including a first current electrode and a control electrode. The electronic component further includes a die pad having a first surface, a plurality of leads and a gull-wing shaped conductive element coupled to a first lead of the plurality of leads. The first current electrode is mounted on the die pad and the gull-wing shaped conductive element is coupled between the control electrode and the first lead.
    Type: Application
    Filed: March 19, 2014
    Publication date: September 24, 2015
    Inventors: Ralf Otremba, Klaus Schiess, Teck Sim Lee
  • Publication number: 20150214133
    Abstract: An electronic device includes a semiconductor chip including an electrode, a substrate element and a contact element connecting the electrode to the substrate element. The electronic device further includes an encapsulant configured to leave the contact element at least partially exposed such that a heatsink may be connected to the contact element.
    Type: Application
    Filed: January 28, 2014
    Publication date: July 30, 2015
    Inventors: Ralf Otremba, Josef Hoeglauer, Juergen Schredl, Teck Sim Lee, Xaver Schloegel, Klaus Schiess
  • Patent number: 9035437
    Abstract: Packaged chips comprising non-integer lead pitches, systems and methods for manufacturing packaged chips are disclosed. In one embodiment a packaged device includes a first chip, a package encapsulating the first chip and a plurality of leads protruding from the package, wherein the plurality of leads comprises differing non-integer multiple lead pitches.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: May 19, 2015
    Assignee: Infineon Technologies Austria AG
    Inventors: Ralf Otremba, Guenther Lohmann, Josef Hoeglauer, Teck Sim Lee, Matteo-Alessandro Kutschak, Wolfgang Peinhopf
  • Publication number: 20150130037
    Abstract: A lead frame strip includes a plurality of connected unit lead frames, each unit lead frame having a die paddle and a plurality of leads connected to a periphery of the unit lead frame. A semiconductor die is attached to the die paddles. A molding compound covers the unit lead frames, including the semiconductor dies. Prior to testing or other processing of the lead frame strip, a gap is etched into a region of the leads which are shared by adjacent ones of the unit lead frames. The gap extends at least mostly through the shared leads. A partial cut is made in the molding compound around the periphery of the unit lead frames prior to the subsequent processing, including below the gap in the shared leads, to electrically isolate the leads of the unit lead frames.
    Type: Application
    Filed: November 12, 2013
    Publication date: May 14, 2015
    Inventors: Frank Püschner, Bernhard Schätzler, Teck Sim Lee, Franz Gabler, Pei Pei Kong, Boon Huat Lim
  • Publication number: 20150115313
    Abstract: In an embodiment, a semiconductor device package includes a bidirectional switch circuit. The bidirectional switch circuit includes a first semiconductor transistor mounted on a first die pad, a second semiconductor transistor mounted on a second die pad, the second die pad being separate from the first die pad, and a conductive connector extending between a source electrode of the first transistor and a source electrode of the second transistor.
    Type: Application
    Filed: October 31, 2013
    Publication date: April 30, 2015
    Inventors: Ralf Otremba, Fabio Brucchi, Franz Stückler, Teck Sim Lee
  • Publication number: 20140264798
    Abstract: Packaged chips comprising non-integer lead pitches, systems and methods for manufacturing packaged chips are disclosed. In one embodiment a packaged device includes a first chip, a package encapsulating the first chip and a plurality of leads protruding from the package, wherein the plurality of leads comprises differing non-integer multiple lead pitches.
    Type: Application
    Filed: March 12, 2013
    Publication date: September 18, 2014
    Applicant: Infineon Technologies Austria AG
    Inventors: Ralf Otremba, Guenther Lohmann, Josef Hoeglauer, Teck Sim Lee, Matteo-Alessandro Kutschak, Wolfgang Peinhopf
  • Patent number: 8836101
    Abstract: Semiconductor packages and method of fabricating them are described. In one embodiment, the semiconductor package includes a substrate having a first and a second die attach pad. A first die is disposed over the first die attach pad. A second die is disposed over the second die attach pad. A third die is disposed between the first and the second die. The third die having a first, a second, and a third portion such that the first portion is disposed above a portion of the first die, the second portion is disposed above a portion of the second die, and the third portion is disposed above an area between the first die and the second die.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: September 16, 2014
    Assignee: Infineon Technologies AG
    Inventors: Chooi Mei Chong, Teck Sim Lee
  • Publication number: 20140210061
    Abstract: Various embodiments provide a chip arrangement. The chip arrangement may include a first chip including a first contact and a second contact; a second chip; a leadframe including a first leadframe portion and a second leadframe portion electrically insulated from the first leadframe portion; and a plurality of pins coupled to the leadframe. At least one first pin is coupled to the first leadframe portion and at least one second pin is coupled to the second leadframe portion. The first contact of the first chip is electrically coupled to the first leadframe portion and the second contact of the first chip is coupled to the second leadframe portion. A contact of the second chip is electrically coupled to the second leadframe portion.
    Type: Application
    Filed: January 28, 2013
    Publication date: July 31, 2014
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Ralf Otremba, Klaus Schiess, Wolfgang Scholz, Teck Sim Lee, Fabio Brucchi, Davide Chiola, Wolfgang Peinhopf, Franz Stueckler
  • Patent number: 8664753
    Abstract: A semiconductor package device having a protruding component portion and a method of packaging the semiconductor device is disclosed. The semiconductor device has a component, such as a leadframe, and a packaging mold body. The packaging mold body is formed around a portion of the component and a recess is formed in the packaging mold body adjacent the protruding portion of the component to prevent the protruding portion of the component from damaging other adjacent and abutting semiconductor devices.
    Type: Grant
    Filed: November 25, 2009
    Date of Patent: March 4, 2014
    Assignee: Infineon Technologies AG
    Inventors: Teck Sim Lee, Chee Voon Tan, Kwai Hong Wong
  • Publication number: 20130154123
    Abstract: In various embodiments, a semiconductor device may include: a carrier; a semiconductor chip disposed over a first side of the carrier; a layer stack disposed between the carrier and the semiconductor chip or over a second side of the carrier opposite the semiconductor chip, or both, the layer stack including at least a first electrically insulating layer, the first electrically insulating layer having a laminate having a first electrically insulating matrix material and a first mechanically stabilizing material embedded in the first electrically insulating matrix material.
    Type: Application
    Filed: December 20, 2011
    Publication date: June 20, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Yong Chern Poh, Sze Lin Celine Tan, Teck Sim Lee, Kean Cheong Lee, Ralf Otremba, Xaver Schloegel, Juergen Schredl, Josef Hoeglauer
  • Patent number: 8466009
    Abstract: A method of fabricating a semiconductor package. In one embodiment the method includes forming a mold cavity about a portion of a first major surface of a leadframe, including about a mold lock opening extending through the leadframe between the first major surface and a second major surface. A spacer is inserted to fill at least a portion of the mold lock opening. The mold cavity is filled with an encapsulating material including filling a portion of the mold lock opening not occupied by the spacer.
    Type: Grant
    Filed: May 13, 2010
    Date of Patent: June 18, 2013
    Assignee: Infineon Technologies AG
    Inventors: Bernd Goller, Markus Dinkel, Wae Chet Yong, Teck Sim Lee, Boon Kian Lim
  • Publication number: 20120074546
    Abstract: Semiconductor packages and method of fabricating them are described. In one embodiment, the semiconductor package includes a substrate having a first and a second die attach pad. A first die is disposed over the first die attach pad. A second die is disposed over the second die attach pad. A third die is disposed between the first and the second die. The third die having a first, a second, and a third portion such that the first portion is disposed above a portion of the first die, the second portion is disposed above a portion of the second die, and the third portion is disposed above an area between the first die and the second die.
    Type: Application
    Filed: September 24, 2010
    Publication date: March 29, 2012
    Inventors: Chooi Mei Chong, Teck Sim Lee