Patents by Inventor Ted-Hong Shinn
Ted-Hong Shinn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160013322Abstract: Disclosed herein is a method for manufacturing an array substrate. The method includes forming a source electrode and a drain electrode on a substrate. A semiconductor layer, an organic insulating layer, and a gate electrode layer are sequentially formed to cover the substrate, the source electrode, and the drain electrode. A patterned photoresist layer is formed on the gate electrode layer. The exposed portion of the gate electrode layer, and a portion of the organic insulative layer and a portion of the semiconductor layer thereunder are removed to form a gate electrode. An organic passivation layer is formed on the gate electrode, the source electrode, and the drain electrode. The organic passivation layer has a contact window to expose a portion of the drain electrode. A pixel electrode is formed on the organic passivation layer and the exposed portion of the drain electrode.Type: ApplicationFiled: September 21, 2015Publication date: January 14, 2016Inventors: Wei-Chou LAN, Ted-Hong SHINN, Henry WANG, Chia-Chun YEH
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Publication number: 20150380445Abstract: Disclosed herein is a method for manufacturing an array substrate. The method includes forming a source electrode and a drain electrode on a substrate. A semiconductor layer, an organic insulating layer, and a gate electrode layer are sequentially formed to cover the substrate, the source electrode, and the drain electrode. A patterned photoresist layer is formed on the gate electrode layer. The exposed portion of the gate electrode layer, and a portion of the organic insulative layer and a portion of the semiconductor layer thereunder are removed to form a gate electrode. An organic passivation layer is formed on the gate electrode, the source electrode, and the drain electrode. The organic passivation layer has a contact window to expose a portion of the drain electrode. A pixel electrode is formed on the organic passivation layer and the exposed portion of the drain electrode.Type: ApplicationFiled: September 4, 2015Publication date: December 31, 2015Inventors: Wei-Chou LAN, Ted-Hong SHINN, Henry WANG, Chia-Chun YEH
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Patent number: 9201542Abstract: A light sensitive display apparatus and an operating method thereof are disclosed herein. The light sensitive display apparatus includes a plurality of pixels, and the operating method of the light sensitive display apparatus includes the following steps. In a writing state, a first data voltage and a first gate voltage are provided to the pixels, and the pixels illuminated by light rays are switched to or kept in a first display state. In an erasing state, a second data voltage and a second gate voltage are provided to the pixels, and the pixels illuminated by light rays are switched to or kept in a second display state.Type: GrantFiled: September 14, 2012Date of Patent: December 1, 2015Assignee: E Ink Holdings Inc.Inventors: Wei-Tsung Chen, Ted-Hong Shinn, Wen-Chung Tang, Chih-Hsiang Yang
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Patent number: 9182641Abstract: The signal line structure is disposed between a gate driver and a display area of a display. The signal line structure includes a substrate, first metal layers, a first insulation layer, second metal layers, a second insulation layer and third metal layers. The first metal layers are arranged in parallel and toward a first direction in the substrate. The first insulation layer is disposed in the substrate and covers the first metal layers. The second metal layers are disposed on the positions of the first insulation layer corresponding to the first metal layers. The second insulation layer is disposed on the second metal layers and the first insulation layer. The third metal layers are disposed on the positions corresponding to the second metal layers in the second insulation layer. The distance between two adjacent second metal layers is less than that between two adjacent first metal layers.Type: GrantFiled: June 23, 2011Date of Patent: November 10, 2015Assignee: E Ink Holdings Inc.Inventors: Wei-Chou Lan, Sung-Hui Huang, Chia-Chun Yeh, Ted-Hong Shinn
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Patent number: 9182850Abstract: A touch type electrophoretic display apparatus, including: at least one photo-controlled voltage source, used for generating at least one reference voltage, wherein the level of the at least one reference voltage gets lower/higher as the intensity of environmental light increases/decreases; and a plurality of photo sensing circuits, each of which including: a photo transistor, generating a channel current according to an incident light; a light intensity storing capacitor, used for integrating the channel current to generate a photo sensing voltage; and an output switch, used for providing an output signal.Type: GrantFiled: January 18, 2012Date of Patent: November 10, 2015Assignee: E INK HOLDINGS INC.Inventors: Chin-Wen Lin, Kai-Cheng Chuang, Ted Hong Shinn
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Patent number: 9177498Abstract: A display panel includes a gate driving circuit and a control circuit. The gate driving circuit includes a plurality of circuit stages. An Nth-circuit stage of the circuit stages includes a start unit, a drive unit, a first pull-down unit, a second pull-down unit, and a current detecting unit. The drive unit is configured to provide a dock signal to an Nth-output terminal. The first pull-down unit is configured to make an enable node have a first pull-down voltage. The second pull-down unit is configured to provide a disable node with a second pull-down voltage. The current detecting unit is configured to detect an error current passing through the first pull-down unit and output an error signal according to the error current. The control circuit is configured to adjust the second pull-down voltage according to the error signal of the Nth-circuit stage.Type: GrantFiled: November 11, 2013Date of Patent: November 3, 2015Assignee: E Ink Holdings Inc.Inventors: Chi-Liang Wu, Po-Hsin Lin, Chin-Wen Lin, Ted-Hong Shinn
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Patent number: 9165955Abstract: Disclosed herein is a method for manufacturing an array substrate. The method includes forming a source electrode and a drain electrode on a substrate. A semiconductor layer, an organic insulating layer, and a gate electrode layer are sequentially formed to cover the substrate, the source electrode, and the drain electrode. A patterned photoresist layer is formed on the gate electrode layer. The exposed portion of the gate electrode layer, and a portion of the organic insulative layer and a portion of the semiconductor layer thereunder are removed to form a gate electrode. An organic passivation layer is formed on the gate electrode, the source electrode, and the drain electrode. The organic passivation layer has a contact window to expose a portion of the drain electrode. A pixel electrode is formed on the organic passivation layer and the exposed portion of the drain electrode.Type: GrantFiled: June 21, 2012Date of Patent: October 20, 2015Assignee: E Ink Holdings Inc.Inventors: Wei-Chou Lan, Ted-Hong Shinn, Henry Wang, Chia-Chun Yeh
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Patent number: 9147769Abstract: A thin film transistor structure including a substrate, a gate, an oxide semiconductor layer, a gate insulation layer, a source, a drain, a silicon-containing light absorption layer and an insulation layer is provided. The gate insulation layer is disposed between the oxide semiconductor layer and the gate. The oxide semiconductor layer and the gate are stacked in a thickness direction. The source and the drain contact the oxide semiconductor layer. A portion of the oxide semiconductor layer without contacting the source and the drain defines a channel region located between the source and the drain. The oxide semiconductor layer is located between the substrate and the silicon-containing light absorption layer. The silicon-containing light absorption layer has a band gap smaller than 2.5 eV. The insulation layer is disposed between the oxide semiconductor layer and the silicon-containing light absorption layer, and in contact with the silicon-containing light absorption layer.Type: GrantFiled: August 12, 2013Date of Patent: September 29, 2015Assignee: E Ink Holdings Inc.Inventors: Cheng-Hang Hsu, Tzung-Wei Yu, Wei-Tsung Chen, Ted-Hong Shinn
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Patent number: 9123691Abstract: Disclosed herein is a thin film transistor. The thin film transistor is characterized in having a source interconnect layer and a drain interconnect layer. The source electrode and the drain electrode are respectively disposed above and in contact with the source interconnect layer and the drain interconnect layer. The semiconductor layer is in contact with both the source interconnect layer and the drain interconnect layer, but is not in contact with the source electrode and the drain electrode.Type: GrantFiled: September 14, 2012Date of Patent: September 1, 2015Assignee: E Ink Holdings Inc.Inventors: Henry Wang, Chia-Chun Yeh, Xue-Hung Tsai, Chih-Hsuan Wang, Ted-Hong Shinn
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Patent number: 9122120Abstract: An electrophoretic display apparatus includes a driving substrate, an electrophoretic display medium layer and a color resist layer. The electrophoretic display medium layer is disposed on the driving substrate. The color resist layer is disposed on the electrophoretic display medium layer. The color resist layer includes pixel zones. The pixel zones include a first color zone, a second color zone, a third color zone, a fourth color zone and a vacant zone. The first color one and the third color zone are respectively positioned on two opposite edges of the vacant zone. The second color zone and the fourth color zone are respectively positioned on another two opposite edges of the vacant zone. The first color zone, the second color zone, the third color zone and the fourth color zone have different colors.Type: GrantFiled: March 12, 2014Date of Patent: September 1, 2015Assignee: E Ink Holdings Inc.Inventors: Fang-An Shu, Ted-Hong Shinn, Kuan-Yi Lin, Tzung-Wei Yu
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Patent number: 9116372Abstract: An exemplary driving substrate includes a substrate, a plurality of first and second signal transmission lines, a first insulation layer and a plurality of switch devices. The first signal transmission lines are disposed on the substrate, and each includes a first line segment(s) and a first connecting segment(s). The first insulation layer is disposed between each first line segment and each first connecting segment, and each first connecting segment is electrically connected to the adjacent first line segment(s) through an opening(s) of the first insulation layer. The second signal transmission lines are disposed on the substrate and electrically insulated and intersected with the first signal transmission lines thereby defining a plurality of pixel regions on the substrate. The switch devices are respectively disposed in the pixel regions, and each is electrically connected to corresponding first and second signal transmission lines. The driving substrate has better reliability.Type: GrantFiled: May 25, 2012Date of Patent: August 25, 2015Assignee: E INK HOLDINGS INC.Inventors: Henry Wang, Ted-Hong Shinn, Chia-Chun Yeh, Wei-Chou Lan
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Patent number: 9112042Abstract: A thin film transistor suitable for being disposed on a substrate is provided. The thin film transistor includes a gate electrode, an organic gate dielectric layer, a metal oxide semiconductor layer, a source electrode and a drain electrode. The gate electrode is disposed on the substrate. The organic gate dielectric layer is disposed on the substrate to cover the gate electrode. The source electrode, the drain electrode and the metal oxide semiconductor layer are disposed above the organic gate dielectric layer, and the metal oxide semiconductor layer contacts with the source electrode and the drain electrode. Because the channel layer of the thin film transistor is a layer of metal oxide semiconductor formed at a lower temperature, thus the thin film transistor can be widely applied into various display applications such as flexible display devices.Type: GrantFiled: September 12, 2012Date of Patent: August 18, 2015Assignee: E INK HOLDINGS INC.Inventors: Wei-Chou Lan, Ted-Hong Shinn, Henry Wang, Chia-Chun Yeh
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Patent number: 9105730Abstract: A thin film transistor and a fabrication method thereof are provided. A metal patterning layer is formed on the metal oxide semiconductor layer of a thin film transistor to shield the metal oxide semiconductor layer from the water, oxygen and light in the environment.Type: GrantFiled: November 21, 2013Date of Patent: August 11, 2015Assignee: E Ink Holdings Inc.Inventors: Wei-Tsung Chen, Ted-Hong Shinn, Chuang-Chuang Tsai, Chih-Hsiang Yang, Chia-Chun Yeh, Wen-Chung Tang
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Patent number: 9101076Abstract: A flexible display device includes a display panel and a plurality of curving-restricting structures. The display panel has a display surface and a bottom surface opposite thereto. The display surface has a visible region and an outer region surrounding the visible region. The curving-restricting structures is disposed on at least one of the outer region of the display surface and the bottom surface of the display panel. Each curving-restricting structure has a top surface and at least a slanted side wall. The top surfaces of adjacent curving-restricting structures are spaced with each other, and the slanted side walls of adjacent curving-restricting structures face each other. When the flexible display device are curved to a predetermined extent, adjacent curving-restricting structures may resist against with each other to prevent the display panel from being unduly curved to be damaged, and thus a use reliability of the flexible display device is improved.Type: GrantFiled: December 12, 2011Date of Patent: August 4, 2015Assignee: E INK HOLDING INC.Inventors: Po-Wen Hsiao, Yuan-Chih Tsai, Ted-Hong Shinn
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Publication number: 20150206950Abstract: A semiconductor structure includes a top gate, an oxide semiconductor channel layer, a first dielectric layer, a second dielectric layer, a source and a drain. The oxide semiconductor channel layer is disposed between the top gate and a substrate. The first dielectric layer is disposed between the top gate and the oxide semiconductor channel layer. The second dielectric layer is disposed between the first dielectric layer and the oxide semiconductor channel layer. The source and the drain are disposed on two opposite sides of the oxide semiconductor channel layer and located between the first dielectric layer and the substrate. A portion of the oxide semiconductor channel layer is exposed between the source and the drain. A portion of the first dielectric layer and a portion of the second dielectric layer directly contact with and entirely cover the portion of the oxide semiconductor channel layer.Type: ApplicationFiled: November 24, 2014Publication date: July 23, 2015Inventors: Wei-Tsung Chen, Chuang-Chuang Tsai, Ted-Hong Shinn, Xue-Hung Tsai, Chih-Hsiang Yang
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Publication number: 20150187672Abstract: A metal oxide semiconductor structure, the structure including: a substrate; a gate electrode, deposited on the substrate; a gate insulation layer, deposited over the gate electrode and the substrate; an IGZO layer, deposited on the gate insulation layer and functioning as a channel; a source electrode, deposited on the gate insulation layer and being at one side of the IGZO layer; a drain electrode, deposited on the gate insulation layer and being at another side of the IGZO layer; a first passivation layer, deposited over the source electrode, the IGZO layer, and the drain electrode; a second passivation layer, deposited over the first passivation layer; and an opaque resin layer, deposited over the source electrode, the second passivation layer, and the drain electrode.Type: ApplicationFiled: March 11, 2015Publication date: July 2, 2015Inventors: Chin-Wen LIN, Chuan-I HUANG, Chung-Chin HUANG, Ted-Hong SHINN
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Patent number: 9069131Abstract: A transfer print structure is provided. The transfer print structure comprises a substrate; a color ink layer including a functional region; and an adhesive device combining the functional region with the substrate.Type: GrantFiled: May 13, 2011Date of Patent: June 30, 2015Assignee: E INK HOLDINGS INC.Inventors: Fang-An Shu, Ted-Hong Shinn, Yao-Chou Tsai, Wen-Chung Tang
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Patent number: 9068729Abstract: A lamp including a light source, a reflective unit and a light modulation module is provided. The light source provides an illuminating light, and the reflective unit reflects the illuminating light. The light modulation module is disposed between the light source and the reflective unit. In the light modulation module, a region where movable light absorbing materials exist is a light absorbing region, and a region where the movable light absorbing materials are absent is a light penetration region. By applying different electrical fields to the movable light absorbing materials, sizes and locations of the light absorbing region and the light penetration region can be changed. A portion of the illuminating light irradiating the light penetration region penetrates through the light penetration region, is transmitted to the reflective unit, being reflected by the reflective unit, and penetrates through the light penetration region again sequentially.Type: GrantFiled: March 15, 2013Date of Patent: June 30, 2015Assignee: E Ink Holdings Inc.Inventors: Chi-Liang Wu, Po-Hsin Lin, Chin-Wen Lin, Ted-Hong Shinn
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Publication number: 20150177894Abstract: The present invention provides a display with touch control function. The display includes a touch panel module, a display module and a FPC hoard. The touch panel module includes a touch panel controller and a touch panel. The display module includes a display driver and a display panel. The touch panel is joined with the display panel. The FPC board couples with the display panel. The touch panel controller and the display driver are disposed on the FPC board.Type: ApplicationFiled: March 5, 2015Publication date: June 25, 2015Inventors: Chin-Wen LIN, Chuan-I HUANG, Henry WANG, Ted-Hong SHINN
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Patent number: 9040987Abstract: A semiconductor device including a substrate, a metal layer, an insulating layer, a semiconductor layer, a drain and a source is provided. The substrate has a surface and a first cavity. The metal layer is disposed on the substrate and covers the surface and inner-wall of the first cavity to define a second cavity corresponding to the first cavity. The insulating layer covers the metal layer and inner-wall of the second cavity to define a third cavity corresponding to the second cavity. The semiconductor layer exposes a portion of the insulating layer and covers the inner-wall of the third cavity to define a fourth cavity corresponding to the third cavity. The drain and source are disposed on the semiconductor layer and covers a portion of the semiconductor layer and a portion of the insulating layer, in which the drain and source expose the fourth cavity.Type: GrantFiled: December 20, 2012Date of Patent: May 26, 2015Assignee: E Ink Holdings Inc.Inventors: Wei-Chou Lan, Ted-Hong Shinn, Henry Wang, Chia-Chun Yeh