Patents by Inventor Teik Sean Toh
Teik Sean Toh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7523010Abstract: A method for automatically inserting connectors and coupling test probes to circuit boards, such as computer system boards and the like. The method is implemented via an apparatus that enables connectors to be automatically inserted into mating connectors on a circuit board device under test (DUT). Connectors may be automatically inserted along 1-4 axes. The apparatus includes replaceable probe/connector plates that are DUT-type specific, as well as DUT-type specific side access units. The apparatus may also be used for inserting memory devices and microprocessors, and further enables peripheral devices to be operatively coupled to expansion bus connectors on the DUT. In one embodiment, a single actuator is employed to actuate up to four insertion axes simultaneously.Type: GrantFiled: December 21, 2005Date of Patent: April 21, 2009Assignee: Intel CorporationInventors: Thomas A. Repko, Frank W. Joyce, Teik Sean Toh, Douglas P. Kreager
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Patent number: 7421365Abstract: An apparatus for automatically inserting connectors and coupling test probes to circuit boards, such as computer system boards and the like. The apparatus enables connectors to be automatically inserted into mating connectors on a circuit board device under test (DUT). Connectors may be automatically inserted along 1-4 axes. The apparatus includes replaceable probe/connector plates that are DUT-type specific, as well as DUT-type specific side access units. The apparatus may also be used for inserting memory devices and microprocessors, and further enables peripheral devices to be operatively coupled to expansion bus connectors on the DUT. In one embodiment, a single actuator is employed to actuate up to four insertion axes simultaneously.Type: GrantFiled: December 21, 2005Date of Patent: September 2, 2008Assignee: Intel CorporationInventors: Thomas A. Repko, Frank W. Joyce, Teik Sean Toh, Douglas P. Kreager
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Patent number: 7375288Abstract: In some embodiments, apparatuses and methods for improving ball-grid-array solder joint reliability in printed circuit boards. Such apparatuses may comprise, in an exemplary embodiment, a stiffened printed circuit board defining one or more cavities therein and including one or more stiffening members positioned, respectively, in the one or more cavities. The cavities and embedded stiffening members may be located proximate a ball-grid-array device footprint so as to resist deflection caused by the application of forces to the board by test probe pins during testing. Such methods may include, in an exemplary embodiment, creating one or more cavities in a middle sub-layer of a core layer of a stiffened printed circuit board and inserting one or more stiffening members, respectively, therein. Top and bottom sub-layers may then be secured to top and bottom surfaces of the middle sub-layer to complete the core layer. Other embodiments are also described and claimed.Type: GrantFiled: July 30, 2004Date of Patent: May 20, 2008Assignee: Intel Corp.Inventors: Sheng Cheang Ch'ng, Azizi Abdul Rakman, Teik Sean Toh
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Patent number: 7208967Abstract: Test modules, systems, and methods employing capacitors for the testing of the solder joint connections between a printed circuit board (PCB) and a socket of a device are presented in embodiments of the current invention. A test module having capacitors in parallel, and in particular embedded capacitors, can be used to test tied traces and their solder joint connections by measuring the total capacitance of the capacitors. Embodiments of the current invention present no-power tests that can be used with a variety of testing platforms and test fixtures, such as in-circuit testing (ICT) and manufacturing defect analysis (MDA.) Additionally, the test module can be used with a variety of sockets, such as a ball grid array, a pinned grid array, and a land grid array.Type: GrantFiled: September 6, 2005Date of Patent: April 24, 2007Assignee: Intel CorporationInventors: Swee Cheng Ho, Teik Sean Toh, Tzyy Haw Tan
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Patent number: 7154257Abstract: An apparatus and method for automatically testing circuit boards, such as computer system boards and the like. The circuit board device under test (DUT) is loaded into an automated test apparatus (tester), which includes a mechanism for automatically connecting test electronics to various DUT circuitry and I/O ports via corresponding connectors on the DUT. A type of DUT is identified, and a corresponding set of tests are performed to verify the operation of the DUT. Appropriate power signals and sequencing are also applied to the DUT, as defined by it type. Data logging is performed to log the results of the testing. The apparatus includes replaceable probe/connector plates that are DUT-type specific and corresponding universal electronics and cabling to enable a variety of different board types to be tested with the same apparatus.Type: GrantFiled: September 30, 2002Date of Patent: December 26, 2006Assignee: Intel CorporationInventors: Chanh Le, Say Cheong Gan, Thomas A. Repko, Frank W. Joyce, Teik Sean Toh, Douglas P. Kreager, Yoong Li Liew
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Patent number: 7129729Abstract: Test modules, systems, and methods employing capacitors for the testing of the solder joint connections between a printed circuit board (PCB) and a socket of a device are presented in embodiments of the current invention. A test module having capacitors in parallel, and in particular embedded capacitors, can be used to test tied traces and their solder joint connections by measuring the total capacitance of the capacitors. Embodiments of the current invention present no-power tests that can be used with a variety of testing platforms and test fixtures, such as in-circuit testing (ICT) and manufacturing defect analysis (MDA.) Additionally, the test module can be used with a variety of sockets, such as a ball grid array, a pinned grid array, and a land grid array.Type: GrantFiled: September 6, 2005Date of Patent: October 31, 2006Assignee: Intel CorporationInventors: Swee Cheng Ho, Teik Sean Toh, Tzyy Haw Tan
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Patent number: 7110905Abstract: An apparatus and method for automatically testing circuit boards, such as computer system boards and the like. The circuit board device under test (DUT) is loaded into an automated test apparatus (tester), which includes a mechanism for automatically connecting test electronics to various DUT circuitry and I/O ports via corresponding connectors on the DUT. A type of DUT is identified, and a corresponding set of tests are performed to verify the operation of the DUT. Appropriate power signals and sequencing are also applied to the DUT, as defined by it type. Data logging is performed to log the results of the testing. The apparatus includes replaceable probe/connector plates that are DUT-type specific and corresponding universal electronics and cabling to enable a variety of different board types to be tested with the same apparatus.Type: GrantFiled: April 9, 2004Date of Patent: September 19, 2006Assignee: Intel CorporationInventors: Chanh Le, Say Cheong Gan, Thomas A. Repko, Frank W. Joyce, Teik Sean Toh, Douglas P. Kreager, Yoong Li Liew
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Patent number: 6999888Abstract: An apparatus and method for automatically inserting connectors and coupling test probes to circuit boards, such as computer system boards and the like. The apparatus enables connectors to be automatically inserted into mating connectors on a circuit board device under test (DUT). Connectors may be automatically inserted along 1–4 axes. The apparatus includes replaceable probe/connector plates that are DUT-type specific, as well as DUT-type specific side access units. The apparatus may also be used for inserting memory devices and microprocessors, and further enables peripheral devices to be operatively coupled to expansion bus connectors on the DUT. In one embodiment, a single actuator is employed to actuate up to four insertion axes simultaneously.Type: GrantFiled: March 21, 2003Date of Patent: February 14, 2006Assignee: Intel CorporationInventors: Thomas A. Repko, Frank W. Joyce, Teik Sean Toh, Douglas P. Kreager
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Patent number: 6956387Abstract: Test modules, systems, and methods employing capacitors for the testing of the solder joint connections between a printed circuit board (PCB) and a socket of a device are presented in embodiments of the current invention. A test module having capacitors in parallel, and in particular embedded capacitors, can be used to test tied traces and their solder joint connections by measuring the total capacitance of the capacitors. Embodiments of the current invention present no-power tests that can be used with a variety of testing platforms and test fixtures, such as in-circuit testing (ICT) and manufacturing defect analysis (MDA.) Additionally, the test module can be used with a variety of sockets, such as a ball grid array, a pinned grid array, and a land grid array.Type: GrantFiled: August 15, 2003Date of Patent: October 18, 2005Assignee: Intel CorporationInventors: Swee Cheng Ho, Teik Sean Toh, Tzyy Haw Tan
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Publication number: 20040189281Abstract: An apparatus and method for automatically testing circuit boards, such as computer system boards and the like. The circuit board device under test (DUT) is loaded into an automated test apparatus (tester), which includes a mechanism for automatically connecting test electronics to various DUT circuitry and I/O ports via corresponding connectors on the DUT. A type of DUT is identified, and a corresponding set of tests are performed to verify the operation of the DUT. Appropriate power signals and sequencing are also applied to the DUT, as defined by it type. Data logging is performed to log the results of the testing. The apparatus includes replaceable probe/connector plates that are DUT-type specific and corresponding universal electronics and cabling to enable a variety of different board types to be tested with the same apparatus.Type: ApplicationFiled: April 9, 2004Publication date: September 30, 2004Inventors: Chanh Le, Say Cheong Gan, Thomas A. Repko, Frank W. Joyce, Teik Sean Toh, Douglas P. Kreager, Yoong Li Liew
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Publication number: 20040064285Abstract: An apparatus and method for automatically inserting connectors and coupling test probes to circuit boards, such as computer system boards and the like. The apparatus enables connectors to be automatically inserted into mating connectors on a circuit board device under test (DUT). Connectors may be automatically inserted along 1-4 axes. The apparatus includes replaceable probe/connector plates that are DUT-type specific, as well as DUT-type specific side access units. The apparatus may also be used for inserting memory devices and microprocessors, and further enables peripheral devices to be operatively coupled to expansion bus connectors on the DUT. In one embodiment, a single actuator is employed to actuate up to four insertion axes simultaneously.Type: ApplicationFiled: March 21, 2003Publication date: April 1, 2004Inventors: Thomas A. Repko, Frank W. Joyce, Teik Sean Toh, Douglas P. Kreager
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Publication number: 20040064288Abstract: An apparatus and method for automatically testing circuit boards, such as computer system boards and the like. The circuit board device under test (DUT) is loaded into an automated test apparatus (tester), which includes a mechanism for automatically connecting test electronics to various DUT circuitry and I/O ports via corresponding connectors on the DUT. A type of DUT is identified, and a corresponding set of tests are performed to verify the operation of the DUT. Appropriate power signals and sequencing are also applied to the DUT, as defined by it type. Data logging is performed to log the results of the testing. The apparatus includes replaceable probe/connector plates that are DUT-type specific and corresponding universal electronics and cabling to enable a variety of different board types to be tested with the same apparatus.Type: ApplicationFiled: September 30, 2002Publication date: April 1, 2004Inventors: Chanh Le, Say Cheong Gan, Thomas A. Repko, Frank W. Joyce, Teik Sean Toh, Douglas P. Kreager, Yoong Li Liew