Abstract: Methods and systems for managing the operation of data processing systems are disclosed. A data processing system may provide computer implemented services. The computer implemented services may be provided with various components operably connected to one another. The data processing system may proactively identify and attempt to remediate mismatches between communication rates of the components and the operable connections between the components. The mismatches may be identified based on electrical widths and clock speeds supported by the operable connections and components.

Abstract: Methods and systems for managing the operation of data processing systems are disclosed. A data processing system may provide computer implemented services. The computer implemented services may be provided with various components operably connected to one another. The data processing system may proactively identify and attempt to remediate mismatches between communication rates of the components and the operable connections between the components. The mismatches may be identified based on electrical widths and clock speeds supported by the operable connections and components.

Abstract: A computing system includes a system board having a system controller device with an interrupt input. A system expansion bus connector is located on the system board and includes power pin(s) and an interrupt signal pin connected to the interrupt input. A peripheral device expansion card system is coupled to the computing system through system expansion bus connector and includes a system power reporting device coupled to the power pin(s) to receive power from the computing system via the power pin(s), and a card controller device coupled to the system power reporting device and to the interrupt signal pin. The card controller device determines, using the system power reporting device, a power state of the computing system. The card controller device also sends, to the system controller device through the interrupt signal pin, an interrupt signal that the system controller device interprets as a hot plug event.

Abstract: A battery includes plural battery cells that output a source voltage to power a device, such as an information handling system. A controller of the battery disconnects each battery cell at a predetermined interval for a predetermined time period, such as from a range of between 15 and 60 seconds, while maintaining the source voltage. The predetermined time and interval are selected based upon the load supplied by the battery and an estimated increase in battery output efficiency.

Abstract: Methods, systems, and computer programs for sending a sensor enable signal to a sensor of an information handling system via a light source, the light source electrically coupling the host controller to the sensor; receiving a feedback signal from the sensor, the feedback signal indicating whether the sensor is in an on state or in an off state; determining, based on the feedback signal, whether the sensor is in the on state or in the off state; determining whether the light source is in an illuminated state or in an unilluminated state; and in response to determining that the sensor is in the on state and that the light source is in the unilluminated state: causing a first notification to be displayed to a user of the information handling system, the first notification indicating to the user that the sensor is in a compromised state.

Abstract: A battery includes plural battery cells that output a source voltage to power a device, such as an information handling system. A controller of the battery disconnects each battery cell at a predetermined interval for a predetermined time period, such as from a range of between 15 and 60 seconds, while maintaining the source voltage. The predetermined time and interval are selected based upon the load supplied by the battery and an estimated increase in battery output efficiency.

Abstract: A computing system includes a system board having a system controller device with an interrupt input. A system expansion bus connector is located on the system board and includes power pin(s) and an interrupt signal pin connected to the interrupt input. A peripheral device expansion card system is coupled to the computing system through system expansion bus connector and includes a system power reporting device coupled to the power pin(s) to receive power from the computing system via the power pin(s), and a card controller device coupled to the system power reporting device and to the interrupt signal pin. The card controller device determines, using the system power reporting device, a power state of the computing system. The card controller device also sends, to the system controller device through the interrupt signal pin, an interrupt signal that the system controller device interprets as a hot plug event.

Abstract: Adapters, systems and methods are provided that may be implemented to adapt a Peripheral Component Interconnect Express (PCIe) expansion (or add-in) card for mounting into a PCIe component bay (e.g., front-accessible “flex bay”) of an information handling system chassis, such as desktop, server or tower computer chassis. An adapter may be provided that carries an edge mount PCIe expansion card that may be mechanically inserted (e.g., in place of a solid state drive “SSD” carrier or other PCIe peripheral component carrier) into the bay to electrically interface the PCIe expansion card with PCIe lane/s and other signal pins of a blind mate PCIe interface bay connector that extends outwardly into a component bay from the distal side (or rear) of the bay.

Abstract: A computing system includes a system board having a system controller device with an interrupt input. A system expansion bus connector is located on the system board and includes power pin(s) and an interrupt signal pin connected to the interrupt input. A peripheral device expansion card system is coupled to the computing system through system expansion bus connector and includes a system power reporting device coupled to the power pin(s) to receive power from the computing system via the power pin(s), and a card controller device coupled to the system power reporting device and to the interrupt signal pin. The card controller device determines, using the system power reporting device, a power state of the computing system. The card controller device also sends, to the system controller device through the interrupt signal pin, an interrupt signal that the system controller device interprets as a hot plug event.

Abstract: Adapters, systems and methods are provided that may be implemented to adapt a Peripheral Component Interconnect Express (PCIe) expansion (or add-in) card for mounting into a PCIe component bay (e.g., front-accessible “flex bay”) of an information handling system chassis, such as desktop, server or tower computer chassis. An adapter may be provided that carries an edge mount PCIe expansion card that may be mechanically inserted(e.g., in place of a solid state drive “SSD” carrier or other PCIe peripheral component carrier) into the bay to electrically interface the PCIe expansion card with PCIe lane/s and other signal pins of a blind mate PCIe interface bay connector that extends outwardly into a component bay from the distal side (or rear) of the bay.

Abstract: A computing system includes a system board having a system controller device with an interrupt input. A system expansion bus connector is located on the system board and includes power pin(s) and an interrupt signal pin connected to the interrupt input. A peripheral device expansion card system is coupled to the computing system through system expansion bus connector and includes a system power reporting device coupled to the power pin(s) to receive power from the computing system via the power pin(s), and a card controller device coupled to the system power reporting device and to the interrupt signal pin. The card controller device determines, using the system power reporting device, a power state of the computing system. The card controller device also sends, to the system controller device through the interrupt signal pin, an interrupt signal that the system controller device interprets as a hot plug event.

Abstract: A gating circuit for a computer system to prevent a power management signal provided by a computer card slot connector or a system board mounted device to change the power state of the computer system from a lower power state to a higher power state when the chassis of the computer system is open. The computer system includes a chassis intrusion detection switch to provide an indication of whether the chassis is open. In one example, the computer card connector is a card slot connector that conforms to the PCI or AGP computer bus standards, and the power management signal is a PME# signal. The gating circuit also prevents a wake on LAN (WOL) signal received via a jumper from a WOL circuit from changing the power state of the computer system from a lower power state to a higher power state.