Patents by Inventor Terry Reiss

Terry Reiss has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6952656
    Abstract: The present invention provides a semiconductor processing device (800) including a tool (802) having one or more sensors, a primary data communication port (804) and a secondary data communication port (806). A sensor data acquisition subsystem (808) acquires sensor data from the tool via the secondary port (806). The data acquisition subsystem (808) acquires MES operation messages via the primary port (804). Sensor data are communicated to a sensor processing unit (828) of a sensor data processing subsystem (810). The sensor processing unit (828) processes and analyzes the sensor data. Additionally, the processing unit (828) can be adapted for making product or processing related decisions, for example activating an alarm if the process is not operating within control limits.
    Type: Grant
    Filed: April 28, 2000
    Date of Patent: October 4, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Sherry Cordova, Terry L. Doyle, Natalia Kroupnova, Evgueni Lobovski, Inna Louneva, Richard C. Lyon, Yukari Nishimura, Clari Nolet, Terry Reiss, Woon Young Toh, Michael E. Wilmer
  • Patent number: 6895293
    Abstract: Fault detection of a semiconductor processing tool employs several techniques to improve accuracy. One technique is sensor grouping, wherein a fault detection index is calculated from a group of tool operational parameters that correlate with one another. Another technique is sensor ranking, wherein sensors are accorded different weights in calculating the fault detection index. Improved accuracy in fault detection may be accomplished by employing a variety of sensor types to predict behavior of the semiconductor processing tool. Examples of such sensor types include active sensors, cluster sensors, passive/inclusive sensors, and synthetic sensors.
    Type: Grant
    Filed: April 11, 2001
    Date of Patent: May 17, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Terry Reiss, Dimitris P. Lymberopoulos
  • Patent number: 6625513
    Abstract: Run-to-run variation of a semiconductor fabrication tool is minimized utilizing a mirror image target. A goal represents a process result desired from operation of the tool. The mirror image target is generated by adding the goal to a difference between an output from a previous tool run and the goal. Prediction of tool performance is based upon a data-based modeling engine utilizing a reference library correlating operational parameters with observed process results for prior tool runs. The mirror image target vector is compared to the reference library and serves as a basis for generating the recipe for the subsequent process run. This recipe automatically brings operation of the tool back toward the goal. The method may further include comparison of the suggested recipe with the recipe of the prior run to determine whether run-to-run variation is serious enough to warrant a change in tool conditions, or whether run-to-run variation is so serious as to indicate a major tool problem.
    Type: Grant
    Filed: August 15, 2000
    Date of Patent: September 23, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Dimitris Lymberopoulos, Terry Reiss, Arulkumar Shanmugasundram
  • Patent number: 6466895
    Abstract: A methodology is provided for qualitatively identifying features of an article, such as defects on the surface of a semiconductor substrate, with a string of symbols, such as numbers, according to relevant defect characteristics and information relating to the processing tools visited by the wafer, including reliability information. Embodiments include generalizing, after a defect on a wafer is discovered and inspected (as by optical review, SEM, EDS, AFM, etc.), each quantitative attribute of the defect such as the defect's size, material composition, color, position on the surface of the wafer, etc. into a qualitative category, assigning a numerical symbol to each attribute for identification, and sequencing the symbols in a predetermined manner. The identification sequences of all defects are stored in a database, where they are easily compared with other correspondingly identified defects.
    Type: Grant
    Filed: May 31, 2000
    Date of Patent: October 15, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Stefanie Harvey, Terry Reiss
  • Publication number: 20020055801
    Abstract: Fault detection of a semiconductor processing tool employs several techniques to improve accuracy. One technique is sensor grouping, wherein a fault detection index is calculated from a group of tool operational parameters that correlate with one another. Another technique is sensor ranking, wherein sensors are accorded different weights in calculating the fault detection index. Improved accuracy in fault detection may be accomplished by employing a variety of sensor types to predict behavior of the semiconductor processing tool. Examples of such sensor types include active sensors, cluster sensors, passive/inclusive sensors, and synthetic sensors.
    Type: Application
    Filed: April 11, 2001
    Publication date: May 9, 2002
    Applicant: Applied Materials, Inc.
    Inventors: Terry Reiss, Dimitris P. Lymberopoulos