Patents by Inventor Teruaki Chino

Teruaki Chino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100200975
    Abstract: A first multilayer wiring structure has a first surface and a second surface positioned on an opposite side to the first surface, a first wiring pattern formed on the second surface side and a housing portion penetrating through the first multilayer wiring structure from the first surface to the second surface. An electronic component has an electrode pad. The electronic component is accommodated in the housing portion in a state that an electrode pad formation surface at the side where the electrode pad is formed is positioned on the second surface side of the first multilayer wiring structure. A second multilayer wiring structure has an insulating layer and a second wiring pattern which are stacked on the second surface of the first multilayer wiring structure and the electrode pad formation surface of the electronic component. The second wiring pattern is electrically connected to the first wiring pattern and the electrode pad.
    Type: Application
    Filed: February 9, 2010
    Publication date: August 12, 2010
    Applicant: Shinko Electric Industries Co., Ltd.
    Inventor: Teruaki CHINO
  • Publication number: 20100184256
    Abstract: A resin sealing method of a semiconductor device includes: positioning semiconductor devices at predetermined positions of an adhesive layer formed on a support body and adhering the semiconductor devices thereto, sealing a part of each of the semiconductor devices with resin by curing a first seal resin in a fluidization state so as to fix the semiconductor devices adhered to the predetermined positions of the adhesive layer formed on the support body, setting the semiconductor devices fixed to the predetermined positions of the adhesive layer formed on the support body in a mold and sealing the exposure parts of the semiconductor devices exposed from the first seal resin with a second seal resin, and removing the support body and the adhesive layer from the semiconductor devices sealed with the resin.
    Type: Application
    Filed: January 14, 2010
    Publication date: July 22, 2010
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Teruaki Chino
  • Publication number: 20100167469
    Abstract: A resin sealing method of a semiconductor device, is provided with: providing a semiconductor device on which a dummy dump is formed; providing a support body including an adhesive layer provided on a surface of the support body; forming a recess in the adhesive layer; inserting the dummy bump of the semiconductor device into the recess of the adhesive layer; adhering the semiconductor device to the adhesive layer with the semiconductor device positioned on the support body; setting the supporting body having the semiconductor device in a resin sealing mold; supplying a resin into a cavity of the resin sealing mold; sealing the semiconductor device with the resin on the support body while using the dummy bump to inhibit displacement of the semiconductor device caused by a flow of the resin supplied into the cavity of the resin sealing mold; and removing the support body, the adhesive layer, and the dummy bump from the semiconductor device sealed with the resin.
    Type: Application
    Filed: December 22, 2009
    Publication date: July 1, 2010
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Teruaki Chino
  • Publication number: 20090141464
    Abstract: A wiring board adapted for mounting an electronic component has the form of a structure in which a plurality of wiring layers are stacked one on top of another with an insulating layer interposed therebetween and are interconnected through via holes formed in the insulating layers, respectively. A plurality of openings are formed through the structure in a region where a wiring is not formed, extending through the structure in a thickness direction thereof. Further, solder resist layers are formed on the outermost wiring layers, respectively, and exposing pad portions defined in desired locations in the outermost wiring layers.
    Type: Application
    Filed: October 31, 2008
    Publication date: June 4, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Yuichi TAGUCHI, Teruaki Chino, Kiyoshi Oi
  • Publication number: 20090121341
    Abstract: A component for semiconductor package which has a protective insulating layer on at least one surface of a component body and exposes a conductive material of the component body to an opening part of the protective insulating layer is manufactured by a method including the steps of (a) forming a mask on at least one surface of the component body, (b) forming the protective insulating layer by filling an opening part of the mask with a protective insulating material by a molding method using a metal mold comprising a mold release film, and (c) removing the metal mold and removing the mask. A typical component is a lead frame or a substrate for semiconductor package.
    Type: Application
    Filed: November 5, 2008
    Publication date: May 14, 2009
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kiyoshi Oi, Teruaki Chino
  • Publication number: 20080303153
    Abstract: In a semiconductor device, a semiconductor element is built into a resin molded part molded in a flat plate shape. A wiring is electrically connected to the semiconductor element and is disposed on one surface of the resin molded part so that an inner surface side of the wiring is sealed with the resin molded part and an outer surface of the wiring is exposed flush with the one surface of the resin molded part. An electrode is disposed on the wiring in an outside of a plane area of the semiconductor element and extends through the resin molded part in a thickness direction. A tip part of the electrode protrudes from the other surface of the resin molded part.
    Type: Application
    Filed: June 6, 2008
    Publication date: December 11, 2008
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kiyoshi Oi, Toru Hizume, Teruaki Chino
  • Publication number: 20080142944
    Abstract: In a stacked package in which a plurality of packages having semiconductor elements mounted on substrates are stacked, while being electrically connected together, by use of connection sections, wherein the connection sections are formed from pillar-like members and solder joint sections and the upper package is supported on the lower package by pillar-like members.
    Type: Application
    Filed: December 10, 2007
    Publication date: June 19, 2008
    Inventors: Kiyoshi Oi, Teruaki Chino