Abstract: A negative reference voltage generating circuit generating a negative reference voltage is provided, including a differential amplifier, a first diode, second diodes, and a third resistor. The differential amplifier includes a non-inverting input terminal, an inverting input terminal, and an output terminal, and is driven by a positive and a negative power voltages. The output terminal is connected with the non-inverting input terminal via a first resistor and connected with the inverting input terminal via a second resistor. The first diode includes a cathode connected with the non-inverting input terminal of the differential amplifier and an anode connected with a ground. The second diodes respectively include a cathode connected with a predetermined connection point and an anode connected with the ground, and are connected in parallel. The third resistor is connected between the connection point and the inverting input terminal of the differential amplifier.

Abstract: A negative reference voltage generating circuit generating a negative reference voltage is provided, including a differential amplifier, a first diode, second diodes, and a third resistor. The differential amplifier includes a non-inverting input terminal, an inverting input terminal, and an output terminal, and is driven by a positive and a negative power voltages. The output terminal is connected with the non-inverting input terminal via a first resistor and connected with the inverting input terminal via a second resistor. The first diode includes a cathode connected with the non-inverting input terminal of the differential amplifier and an anode connected with a ground. The second diodes respectively include a cathode connected with a predetermined connection point and an anode connected with the ground, and are connected in parallel. The third resistor is connected between the connection point and the inverting input terminal of the differential amplifier.

Abstract: A negative reference voltage generating circuit includes a clamp-type reference voltage circuit and a differential amplifier. The clamp-type reference voltage circuit is connected between a node of a first negative voltage which is equal to or lower than the ground voltage and a node of a second negative voltage which is lower than the first negative voltage, and is formed by connecting a first circuit and a second circuit in parallel. The differential amplifier amplifies the difference between a node voltage in the first circuit and a node voltage in the second circuit, and outputs a negative reference voltage.

Abstract: A negative reference voltage generating circuit includes a clamp-type reference voltage circuit and a differential amplifier. The clamp-type reference voltage circuit is connected between a node of a first negative voltage which is equal to or lower than the ground voltage and a node of a second negative voltage which is lower than the first negative voltage, and is formed by connecting a first circuit and a second circuit in parallel. The differential amplifier amplifies the difference between a node voltage in the first circuit and a node voltage in the second circuit, and outputs a negative reference voltage.

Abstract: A register setting method which facilitates writing of change information into a register for storing operation condition information that defines the operation of a device. The method includes the steps of storing first operation condition information in a first register, storing second operation condition information in a second register, changing the first operation condition information, and when the first operation condition information is changed, changing the second operation condition information to changed first operation condition information in accordance with change information for changing the first operation condition information.

Abstract: A register setting method which facilitates writing of change information into a register for storing operation condition information that defines the operation of a device. The method includes the steps of storing first operation condition information in a first register, storing second operation condition information in a second register, changing the first operation condition information, and when the first operation condition information is changed, changing the second operation condition information to changed first operation condition information in accordance with change information for changing the first operation condition information.

Abstract: A register setting method which facilitates writing of change information into a register for storing operation condition information that defines the operation of a device. The method includes the steps of storing first operation condition information in a first register, storing second operation condition information in a second register, changing the first operation condition information, and when the first operation condition information is changed, changing the second operation condition information to changed first operation condition information in accordance with change information for changing the first operation condition information.

Abstract: A register setting method which facilitates writing of change information into a register for storing operation condition information that defines the operation of a device. The method includes the steps of storing first operation condition information in a first register, storing second operation condition information in a second register, changing the first operation condition information, and when the first operation condition information is changed, changing the second operation condition information to changed first operation condition information in accordance with change information for changing the first operation condition information.

Abstract: A bipolar random access memory comprises a plurality of memory cells arranged in row and column formation, a plurality of word lines provided in correspondence to respective rows of the memory cells, a plurality of bit lines provided in correspondence to respective columns of the memory cells, a row addressing part connected to each of the plurality of word lines, a column addressing part connected to each pair of the adjacent bit lines, a read/write controller supplied with a cell information to be written into an addressed memory cell and further with a read/write control signal indicating whether the random access memory is to be operated in a reading mode or in a writing mode and acting as a current source in the reading and writing modes, a first current control part provided in each column of the memory cells so as to be connected to one of the bit lines in a column selected by the column addressing part at the first side of each of the memory cells, a second current control part provided in each column