Patents by Inventor Teruaki Yamamoto

Teruaki Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5049221
    Abstract: A process for producing a copper-clad laminate, which comprises a step (S2) of forming a copper foil of at least several micrometers on a planar conductive substrate by electrolysis, a step (S3) of roughening the surface of the copper foil, a step (S4) of laminating the copper foil together with the conductive substrate on an insulating substrate and tightly integrating the assembly by applying pressure and heat, and a step (S5) of separating only the conductive substrate. A metal film may exist between the conductive substrate and the copper foil. When the metal film has a thickness of 0.1 to 3 .mu.m, only the conductive substrate is separated with the metal film being firmly adhered to the copper foil surface and, when the metal film has a thickness of 70 to 250 .mu.m, it is separated together with the conductive substrate after the lamination. The copper foil formed by high-speed plating under the conditions of 6 to 12.0 m/sec in solution contact speed and 0.8 to 4.0 A/cm.sup.
    Type: Grant
    Filed: May 1, 1989
    Date of Patent: September 17, 1991
    Assignee: Meiko Electronics Co., Ltd.
    Inventors: Tatsuo Wada, Keizo Yamashita, Tasuku Touyama, Teruaki Yamamoto
  • Patent number: 4790902
    Abstract: A thin metal layer with a thickness of 1 to 5 .mu. is formed electrolytically (S2) on an electrically conductive single-plate substrate having a predetermined roughness, a resist mask is formed (S3) on the surface of the thin metal layer, and a conductor circuit is then electroformed thereon (S4) using copper. After the surface of the conductor circuit is roughened (S5), the conductor circuit, along with the single plate and the interposed thin metal layer, is stacked on an insulating substrate for lamination, and the individual layers are adhered integrally to one another by the application of heat and pressure (S7). Then, the single plate only is peeled off (S8), and the exposed thin metal layer is removed by etching (S9). The thin metal layer and the conductor circuit are electroplated under high-speed conditions including a solution contact speed of 2.6 to 20 m/sec and a current density of 0.15 to 4.0 A/cm.sup.
    Type: Grant
    Filed: October 16, 1987
    Date of Patent: December 13, 1988
    Assignee: Meiko Electronics Co., Ltd.
    Inventors: Tatsuo Wada, Keizo Yamashita, Tasuku Touyama, Teruaki Yamamoto
  • Patent number: 4323441
    Abstract: Apparatus for the production of metal foil or printed circuit patterns on a continuously advancing strip of electrically conductive material includes a cathode under which the conductive strip is fed in sliding contact therewith. An insoluble anode is disposed under the cathode, with an interelectrode gap between the anode and the cathodic conductive strip traveling under the cathode. Lying next to one end of the anode is a solution inlet block defining a solution inlet from which the electroplating solution containing the metal to be deposited is fed turbulently into the interelectrode gap to cause the electrodeposition of the metal on the downward-facing surface of the conductive strip. A shield block of electrically insulating material is mounted over the solution inlet block for shielding the conductive strip traveling thereover from premature metal deposition due to leaking current and hence for avoiding the development of pinholes in the metal foil or circuit patterns.
    Type: Grant
    Filed: January 7, 1981
    Date of Patent: April 6, 1982
    Assignee: Koito Seisakusho Co. Ltd.
    Inventors: Glenn R. Schaer, Tasuku Touyama, Teruaki Yamamoto, Keisuke Honda, Tatsuo Wada