Abstract: A distributed circuit includes: a first transmission line that has an input end to which an input signal is input; a second transmission line that has an output end from which an output signal is output; a plurality of unit cells that are disposed along the first and second transmission lines, the input terminals of the unit cells being connected to the first transmission line, the output terminals of the unit cells being connected to the second transmission line; two input termination resistors connected in parallel to an end of the first transmission line; and two output termination resistors connected in parallel to an end of the second transmission line. In the distributed circuit, at least one input termination resistor is a temperature-gradient resistor, and voltages at the two input termination resistors are changed symmetrically.

Abstract: A capacitor includes a pair of facing stacked electrodes connected to an electrical wiring from the outside. The stacked electrode includes a plurality of wiring layers and a via layer between the wiring layers. The stacked electrode includes combs and a comb connection portion connected to base ends of the combs. A dielectric is provided between one stacked electrode and the other stacked electrode. The comb of the other stacked electrode is disposed between the combs of the one stacked electrode.

Abstract: A voltage-controlled oscillator includes a first unit cell, a second unit cell that is connected in parallel to the first unit cell via transmission lines, a compensation unit cell that is connected in parallel with the first unit cell and the second unit cell between the first unit cell and the second unit cell, and an input termination resistor that is connected to a power supply voltage terminal of each of the first unit cell, the second unit cell, and the compensation unit cell. Symmetrical voltages are supplied to the first unit cell and the second unit cell, and the compensation unit cell compensates for a gain by the first unit cell or the second unit cell.

Abstract: A unit amplifier has first and second transistors, which are cascode-connected, and a first variable resistance circuit. A base terminal or a gate terminal of the first transistor is connected to a cell input terminal, a collector terminal or a drain terminal of the second transistor is connected to a cell output terminal, an emitter terminal or a source terminal of the second transistor is connected to a collector terminal or a drain terminal of the first transistor, and one end of the first variable resistance circuit is connected to a connecting point of the first and second transistors.

Abstract: A voltage setting circuit includes a frequency comparator that compares the oscillation frequencies of a first distributed voltage-controlled oscillator and a second distributed voltage-controlled oscillator and a frequency determination circuit that determines the levels of the oscillation frequencies of the first distributed voltage-controlled oscillator and the second distributed voltage-controlled oscillator. The bias to be supplied to the first distributed voltage-controlled oscillator and the bias to be supplied to the second distributed voltage-controlled oscillator are determined in accordance with a result of the determination. The bias at a time when the levels of the oscillation frequencies are reversed is determined to be the optimum bias, and the optimum bias is supplied to the core circuit.

Abstract: An analog demultiplexer circuit includes a clock distribution circuit that outputs clock signals (CK1P and CK1N) and clock signals (CK2P and CK2N) complementary thereto, a track-and-hold circuit that holds analog input signals (VINP and VINN) in synchronization with the clock signals (CK1P and CK1N), and a track-and-hold circuit that holds the analog input signals (VINP and VINN) in synchronization with the clock signals (CK2P and CK2N).

Abstract: In an embodiment, an edge extraction method includes: emitting, toward an object, an electromagnetic wave polarized only in one direction perpendicular to a propagation direction; receiving a transmitted electromagnetic wave that has been transmitted through the object, using a receiving antenna; calculating an intensity in the propagation direction of the transmitted electromagnetic wave based on an intensity of the transmitted electromagnetic wave received by the receiving antenna; and obtaining a spatial distribution of the intensity in the propagation direction of the transmitted electromagnetic wave.

Abstract: An analog demultiplexer circuit includes a clock distribution circuit that outputs clock signals (CK1P and CK1N) and clock signals (CK2P and CK2N) complementary thereto, a track-and-hold circuit that holds analog input signals (VINP and VINN) in synchronization with the clock signals (CK1P and CK1N), and a track-and-hold circuit that holds the analog input signals (VINP and VINN) in synchronization with the clock signals (CK2P and CK2N).

Abstract: An amplifier circuit comprises a variable degeneration circuit connected to emitter terminals of transistors, and a variable negative capacitance circuit connected to differential output signal terminals. The variable degeneration circuit includes a variable capacitor and a resistor. The variable negative capacitance circuit, which is a variable current source, includes a transistor, a capacitor, and a variable current source. The variable negative capacitance circuit includes transistors, a capacitor, and variable current sources.

Abstract: A distributed amplifier includes a first transmission line for input, a second transmission line for output, an input termination resistor connecting a line end of the first transmission line and a power supply voltage, an output termination resistor connecting an input end of the second transmission line and a ground, unit cells having input terminals connected to the first transmission line and output terminals connected to the second transmission line, and a bias tee configured to supply a bias voltage to an input transistor of each of the unit cells. An emitter or source resistor of the input transistor of each of the unit cells is set to a different resistance value from each other in order for a collector or drain current flowing through the input transistor of each of the unit cells to have a uniform value.

Abstract: An embodiment includes an output circuit with transistors and a withstand voltage protection circuit. The withstand voltage protection circuit includes resistors connected between an output signal terminal on the positive phase side and an output signal terminal on the negative phase side. A switch includes an NMOS transistor having a gate terminal connected to the connection point of the resistors, a drain terminal connected to the bias voltage, and a source terminal connected to the base terminal of the transistor.

Abstract: The driver circuit includes DC cut capacitors, an input buffer, input termination resistors connected in series between differential input signal terminals and an ESD protection circuit connected to a connection point of the input terminal resistors. The ESD protection circuit includes diodes.

Abstract: An embodiment is a distributed amplifier including amplifier blocks, each of the amplifier blocks including a first transmission line to receive input of a signal to an input end, a second transmission line to output a signal from an output end, a first termination resistor having a first end connected to a terminal end of the first transmission line, a second termination resistor having a first end connected to an input end of the second transmission line, and unit cells arranged along the first and second transmission lines, each of the unit cells having an input terminal connected to the first transmission line and an output terminal connected to the second transmission line, the amplifier blocks are connected in cascade such that a terminal end of the second transmission line of one of the amplifier blocks is connected to the first transmission line of a subsequent amplifier block.

Abstract: An embodiment is a multiplexer including a first distributed amplifier with an impedance matched to 50?, the first distributed amplifier configured to receive a first signal and output a first amplified signal, a second distributed amplifier with an impedance matched to 50?, the second distributed amplifier configured to receive a second signal and output a second amplified signal, and a passive multiplexer configured to multiplex the first amplified signal and the second amplified signal, and output a multiplexed signal to a signal output terminal, the passive multiplexer including a first resistor having a first end to receive the first amplified signal, a second resistor having a first end to receive the second amplified signal, and a third resistor having a first end connected to second ends of the first and second resistors and a second end connected to the signal output terminal.

Abstract: A first phase adjuster adjusts the phase of any one of first and second AC voltages generated in a negative resistance circuit so that a shift amount ? in a first variable phase shifter falls within a range of 0 degrees??<180 degrees, and outputs the phase-adjusted AC voltage to the first variable phase shifter, and a second phase adjuster adjusts the phase of the other one of the first and second AC voltages generated in the negative resistance circuit so that a shift amount ? in a second variable phase shifter falls within a range of 0 degrees??<180 degrees, and outputs the phase-adjusted AC voltage to the second variable phase shifter.

Abstract: A permittivity measuring method includes measuring a set of phases at sampling frequencies of at least three points in each of a first-half portion and a second-half portion of a phase characteristic of electromagnetic waves that passed through a measurement target, if the mode of the phase changes of both sets of phases belongs to a phase group in which change of the at least three points in the first half and change of at least three points in the second half are both monotonic change, maximal values, or minimal values, calculating the permittivity using the phase slope of the phases in the first-half portion and the phases in the second-half portion, and if the mode of the phase changes does not belong to the phase group, calculating the permittivity by fitting the phases of either the first half or the second half to a quadratic function.

Abstract: A driver circuit includes a differential pair of transistors that amplify differential input signals and output the amplified differential input signals from signal output terminals, a current source that supplies a constant current to the differential pair of transistors, a switch that stops the current supply from the current source to the differential pair of transistors during a shutdown mode period, capacitors each having one end connected to the ground, a switch that connects the capacitor to the signal output terminal during the shutdown mode period and disconnects the capacitor from the signal output terminal during an amplification mode period, and a switch that connects the capacitor to the signal output terminal during the shutdown mode period and disconnects the capacitor from the signal output terminal during the amplification mode period.

Abstract: A distributed amplifier includes a transmission line configured so as to transmit a signal, a variable capacitor having one end connected to the transmission line and the other end connected to the ground, and configured so that the capacitance is adjustable, and a variable capacitor having one end connected to the transmission line and the other end connected to the ground, and configured so that the capacitance is adjustable. The transmission line is configured in such a manner that the inductance is adjustable.

Abstract: A distributed amplifier includes: a transmission line having an input end that an input signal is input to; a transmission line having an output end that an output signal is output from; an input termination resistor connected to an end terminal of the transmission line; a plurality of unit cells arranged along the transmission lines, and having input terminals connected to the transmission line and output terminals connected to the transmission line; and a variable current source having one end connected to the end terminal of the transmission line and another end connected to a power supply voltage, and capable of adjusting a current amount between the transmission line and the power supply voltage.

Abstract: In a distributed amplifier, a plurality of cascode amplifiers connected in parallel between an input side transmission line and an output side transmission line are provided, a transmission line is connected to an input terminal of an output transistor of each of the amplifiers, and a bias potential is applied from a bias circuit to the input terminal of the output transistor via the transmission line.