Patents by Inventor Teruyuki Kagami

Teruyuki Kagami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5520297
    Abstract: A semiconductor substrate has a plurality of chip portions and chip separating portions for partitioning the plurality of chip portions into each other. The plurality of chip portions and the separating portions are etched on one side of the semiconductor substrate so that each of the plurality of chip portions is provided with stencil patterns. Furthermore, the plurality of chip portions and chip separating portions are etched on the other side of the semiconductor substrate so that the stencil patterns are exposed and the plurality of chip portions are capable of being substantially separated from each other.
    Type: Grant
    Filed: June 14, 1994
    Date of Patent: May 28, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Teruyuki Kagami, Sakae Yaita, Niro Katane, Mitsuo Tanabe, Yoshinori Nakayama, Hidetoshi Satoh
  • Patent number: 4691223
    Abstract: A semiconductor device includes a semiconductor substrate having at least three semiconductor layers of alternately different conductivity types between a pair of principal surfaces. A pair of main electrodes are kept in low-resistance contact with the outermost ones of the semiconductor layers. A surface-passivation insulating film is provided on an exposed surface of the semiconductor substrate. A resistive material sheet is provided on the insulating film and connected electrically to semiconductor layers having their potentials substantially equal to the main electrodes.
    Type: Grant
    Filed: November 6, 1985
    Date of Patent: September 1, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Susumu Murakami, Teruyuki Kagami, Tsutomu Yatsuo, Masaaki Takahashi
  • Patent number: 4151502
    Abstract: A semiconductor transducer comprises a semiconductor strain gauge composed of a mono-crystalline semiconducting material and a strain sensing region formed in a first main surface of the mono-crystalline semiconducting material, and a strain measuring member coupled to the semiconductor strain gauge through an alloy material. An electrical insulating layer is attached to a second main surface of the mono-crystalline semiconducting material which is coupled to the strain measuring member through the alloy material. The insulating layer is extended to a side surface of the mono-crystalline semiconducting material thereby to cover the same side.
    Type: Grant
    Filed: April 15, 1977
    Date of Patent: April 24, 1979
    Assignee: Hitachi, Ltd.
    Inventors: Yasutoshi Kurihara, Tetuo Kosugi, Teruyuki Kagami, Satoshi Shimada, Yasumasa Matsuda, Kazuji Yamada