Patents by Inventor Tetsuaki Adachi

Tetsuaki Adachi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11398805
    Abstract: Provided is a power amplification module that includes: an amplification transistor that has a constant power supply voltage supplied to a collector thereof, a bias current supplied to a base thereof and that amplifies an input signal input to the base thereof and outputs an amplified signal from the collector thereof; a first current source that outputs a first current that corresponds to a level control voltage that is for controlling a signal level of the amplified signal; and a bias transistor that has the first current supplied to a collector thereof, a bias control voltage connected to a base thereof and that outputs the bias current from an emitter thereof.
    Type: Grant
    Filed: June 13, 2018
    Date of Patent: July 26, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shota Ishihara, Yusuke Shimamune, Takashi Soga, Fuminori Morisawa, Seiko Ono, Tetsuaki Adachi
  • Patent number: 11264952
    Abstract: Provided is a power amplification circuit that includes: an amplifier that amplifies an input signal and outputs an amplified signal; a first bias circuit that supplies a first bias current or voltage to the amplifier; a second bias circuit that supplies a second bias current or voltage to the amplifier; a first control circuit that controls the first bias current or voltage; and a second control circuit that controls the second bias current or voltage. The current supplying capacity of the first bias circuit is different from the current supplying capacity of the second bias circuit.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: March 1, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Tetsuaki Adachi, Kazuo Watanabe, Masahito Numanami, Yasuhisa Yamamoto
  • Patent number: 10965325
    Abstract: A communication unit includes the following elements. A first transmit circuit outputs a first signal or a second signal from a first input signal. A first amplifier amplifies the first signal and outputs a first amplified signal. A first signal generating circuit generates a third signal having a frequency higher than a frequency of the second signal, based on the second signal and a first reference signal. A first filter circuit receives the third signal and allows one of a frequency component representing a sum of the frequency of the second signal and a frequency of the first reference signal and a frequency component representing a difference therebetween to pass through the first filter circuit and attenuates the other one of the frequency components. A second amplifier amplifies the third signal output from the first filter circuit and outputs a second amplified signal.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: March 30, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Kazuo Watanabe, Tetsuaki Adachi, Masahito Numanami, Yasuhisa Yamamoto
  • Patent number: 10944438
    Abstract: A communication unit includes the following elements. A first transmit circuit outputs a first signal or a second signal from a first input signal. A first amplifier amplifies the first signal and outputs a first amplified signal. A first signal generating circuit generates a third signal having a frequency higher than a frequency of the second signal, based on the second signal and a first reference signal. A first filter circuit receives the third signal and allows one of a frequency component representing a sum of the frequency of the second signal and a frequency of the first reference signal and a frequency component representing a difference therebetween to pass through the first filter circuit and attenuates the other one of the frequency components. A second amplifier amplifies the third signal output from the first filter circuit and outputs a second amplified signal.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: March 9, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Kazuo Watanabe, Tetsuaki Adachi, Masahito Numanami, Yasuhisa Yamamoto
  • Publication number: 20210006205
    Abstract: Provided is a power amplification circuit that includes: an amplifier that amplifies an input signal and outputs an amplified signal; a first bias circuit that supplies a first bias current or voltage to the amplifier; a second bias circuit that supplies a second bias current or voltage to the amplifier; a first control circuit that controls the first bias current or voltage; and a second control circuit that controls the second bias current or voltage. The current supplying capacity of the first bias circuit is different from the current supplying capacity of the second bias circuit.
    Type: Application
    Filed: September 17, 2020
    Publication date: January 7, 2021
    Inventors: Satoshi TANAKA, Tetsuaki ADACHI, Kazuo WATANABE, Masahito NUMANAMI, Yasuhisa YAMAMOTO
  • Patent number: 10819286
    Abstract: Provided is a power amplification circuit that includes: an amplifier that amplifies an input signal and outputs an amplified signal; a first bias circuit that supplies a first bias current or voltage to the amplifier; a second bias circuit that supplies a second bias current or voltage to the amplifier; a first control circuit that controls the first bias current or voltage; and a second control circuit that controls the second bias current or voltage. The current supplying capacity of the first bias circuit is different from the current supplying capacity of the second bias circuit.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: October 27, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Tetsuaki Adachi, Kazuo Watanabe, Masahito Numanami, Yasuhisa Yamamoto
  • Publication number: 20190190546
    Abstract: A communication unit includes the following elements. A first transmit circuit outputs a first signal or a second signal from a first input signal. A first amplifier amplifies the first signal and outputs a first amplified signal. A first signal generating circuit generates a third signal having a frequency higher than a frequency of the second signal, based on the second signal and a first reference signal. A first filter circuit receives the third signal and allows one of a frequency component representing a sum of the frequency of the second signal and a frequency of the first reference signal and a frequency component representing a difference therebetween to pass through the first filter circuit and attenuates the other one of the frequency components. A second amplifier amplifies the third signal output from the first filter circuit and outputs a second amplified signal.
    Type: Application
    Filed: February 26, 2019
    Publication date: June 20, 2019
    Inventors: Satoshi TANAKA, Kazuo WATANABE, Tetsuaki ADACHI, Masahito NUMANAMI, Yasuhisa YAMAMOTO
  • Publication number: 20190190547
    Abstract: A communication unit includes the following elements. A first transmit circuit outputs a first signal or a second signal from a first input signal. A first amplifier amplifies the first signal and outputs a first amplified signal. A first signal generating circuit generates a third signal having a frequency higher than a frequency of the second signal, based on the second signal and a first reference signal. A first filter circuit receives the third signal and allows one of a frequency component representing a sum of the frequency of the second signal and a frequency of the first reference signal and a frequency component representing a difference therebetween to pass through the first filter circuit and attenuates the other one of the frequency components. A second amplifier amplifies the third signal output from the first filter circuit and outputs a second amplified signal.
    Type: Application
    Filed: February 26, 2019
    Publication date: June 20, 2019
    Inventors: Satoshi TANAKA, Kazuo WATANABE, Tetsuaki ADACHI, Masahito NUMANAMI, Yasuhisa YAMAMOTO
  • Patent number: 10256848
    Abstract: A communication unit includes the following elements. A first transmit circuit outputs a first signal or a second signal from a first input signal. A first amplifier amplifies the first signal and outputs a first amplified signal. A first signal generating circuit generates a third signal having a frequency higher than a frequency of the second signal, based on the second signal and a first reference signal. A first filter circuit receives the third signal and allows one of a frequency component representing a sum of the frequency of the second signal and a frequency of the first reference signal and a frequency component representing a difference therebetween to pass through the first filter circuit and attenuates the other one of the frequency components. A second amplifier amplifies the third signal output from the first filter circuit and outputs a second amplified signal.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: April 9, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Kazuo Watanabe, Tetsuaki Adachi, Masahito Numanami, Yasuhisa Yamamoto
  • Patent number: 10256849
    Abstract: A communication unit includes the following elements. A first transmit circuit outputs a first signal or a second signal from a first input signal. A first amplifier amplifies the first signal and outputs a first amplified signal. A first signal generating circuit generates a third signal having a frequency higher than a frequency of the second signal, based on the second signal and a first reference signal. A first filter circuit receives the third signal and allows one of a frequency component representing a sum of the frequency of the second signal and a frequency of the first reference signal and a frequency component representing a difference therebetween to pass through the first filter circuit and attenuates the other one of the frequency components. A second amplifier amplifies the third signal output from the first filter circuit and outputs a second amplified signal.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: April 9, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Kazuo Watanabe, Tetsuaki Adachi, Masahito Numanami, Yasuhisa Yamamoto
  • Publication number: 20190103841
    Abstract: Provided is a power amplification circuit that includes: an amplifier that amplifies an input signal and outputs an amplified signal; a first bias circuit that supplies a first bias current or voltage to the amplifier; a second bias circuit that supplies a second bias current or voltage to the amplifier; a first control circuit that controls the first bias current or voltage; and a second control circuit that controls the second bias current or voltage. The current supplying capacity of the first bias circuit is different from the current supplying capacity of the second bias circuit.
    Type: Application
    Filed: November 30, 2018
    Publication date: April 4, 2019
    Inventors: Satoshi TANAKA, Tetsuaki ADACHI, Kazuo WATANABE, Masahito NUMANAMI, Yasuhisa YAMAMOTO
  • Patent number: 10171036
    Abstract: Provided is a power amplification circuit that includes: an amplifier that amplifies an input signal and outputs an amplified signal; a first bias circuit that supplies a first bias current or voltage to the amplifier; a second bias circuit that supplies a second bias current or voltage to the amplifier; a first control circuit that controls the first bias current or voltage; and a second control circuit that controls the second bias current or voltage. The current supplying capacity of the first bias circuit is different from the current supplying capacity of the second bias circuit.
    Type: Grant
    Filed: July 21, 2017
    Date of Patent: January 1, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Tetsuaki Adachi, Kazuo Watanabe, Masahito Numanami, Yasuhisa Yamamoto
  • Publication number: 20180294788
    Abstract: Provided is a power amplification module that includes: an amplification transistor that has a constant power supply voltage supplied to a collector thereof, a bias current supplied to a base thereof and that amplifies an input signal input to the base thereof and outputs an amplified signal from the collector thereof; a first current source that outputs a first current that corresponds to a level control voltage that is for controlling a signal level of the amplified signal; and a bias transistor that has the first current supplied to a collector thereof, a bias control voltage connected to a base thereof and that outputs the bias current from an emitter thereof.
    Type: Application
    Filed: June 13, 2018
    Publication date: October 11, 2018
    Inventors: Shota Ishihara, Yusuke Shimamune, Takashi Soga, Fuminori Morisawa, Seiko Ono, Tetsuaki Adachi
  • Patent number: 10020786
    Abstract: Provided is a power amplification module that includes: an amplification transistor that has a constant power supply voltage supplied to a collector thereof, a bias current supplied to a base thereof and that amplifies an input signal input to the base thereof and outputs an amplified signal from the collector thereof; a first current source that outputs a first current that corresponds to a level control voltage that is for controlling a signal level of the amplified signal; and a bias transistor that has the first current supplied to a collector thereof, a bias control voltage connected to a base thereof and that outputs the bias current from an emitter thereof.
    Type: Grant
    Filed: July 5, 2016
    Date of Patent: July 10, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shota Ishihara, Yusuke Shimamune, Takashi Soga, Fuminori Morisawa, Seiko Ono, Tetsuaki Adachi
  • Publication number: 20180062579
    Abstract: Provided is a power amplification circuit that includes: an amplifier that amplifies an input signal and outputs an amplified signal; a first bias circuit that supplies a first bias current or voltage to the amplifier; a second bias circuit that supplies a second bias current or voltage to the amplifier; a first control circuit that controls the first bias current or voltage; and a second control circuit that controls the second bias current or voltage. The current supplying capacity of the first bias circuit is different from the current supplying capacity of the second bias circuit.
    Type: Application
    Filed: July 21, 2017
    Publication date: March 1, 2018
    Inventors: Satoshi Tanaka, Tetsuaki Adachi, Kazuo Watanabe, Masahito Numanami, Yasuhisa Yamamoto
  • Publication number: 20180006608
    Abstract: Provided is a bias circuit that supplies a first bias current or voltage to an amplifier that amplifies a radio frequency signal. The bias circuit includes: an FET that has a power supply voltage supplied to a drain thereof and that outputs the first bias current or voltage from a source thereof; a first bipolar transistor that has a collector thereof connected to a gate of the FET, that has a base thereof connected to the source of the FET, that has a common emitter and that has a constant current supplied to the collector thereof; and a first capacitor that has one end thereof connected to the collector of the first bipolar transistor and that suppresses variations in a collector voltage of the first bipolar transistor.
    Type: Application
    Filed: April 6, 2017
    Publication date: January 4, 2018
    Inventors: Satoshi TANAKA, Tetsuaki ADACHI, Kazuo WATANABE, Masahito NUMANAMI, Yasuhisa YAMAMOTO
  • Publication number: 20170302300
    Abstract: A communication unit includes the following elements. A first transmit circuit outputs a first signal or a second signal from a first input signal. A first amplifier amplifies the first signal and outputs a first amplified signal. A first signal generating circuit generates a third signal having a frequency higher than a frequency of the second signal, based on the second signal and a first reference signal. A first filter circuit receives the third signal and allows one of a frequency component representing a sum of the frequency of the second signal and a frequency of the first reference signal and a frequency component representing a difference therebetween to pass through the first filter circuit and attenuates the other one of the frequency components. A second amplifier amplifies the third signal output from the first filter circuit and outputs a second amplified signal.
    Type: Application
    Filed: April 18, 2017
    Publication date: October 19, 2017
    Inventors: Satoshi TANAKA, Kazuo WATANABE, Tetsuaki ADACHI, Masahito NUMANAMI, Yasuhisa YAMAMOTO
  • Publication number: 20170302301
    Abstract: A communication unit includes the following elements. A first transmit circuit outputs a first signal or a second signal from a first input signal. A first amplifier amplifies the first signal and outputs a first amplified signal. A first signal generating circuit generates a third signal having a frequency higher than a frequency of the second signal, based on the second signal and a first reference signal. A first filter circuit receives the third signal and allows one of a frequency component representing a sum of the frequency of the second signal and a frequency of the first reference signal and a frequency component representing a difference therebetween to pass through the first filter circuit and attenuates the other one of the frequency components. A second amplifier amplifies the third signal output from the first filter circuit and outputs a second amplified signal.
    Type: Application
    Filed: April 18, 2017
    Publication date: October 19, 2017
    Inventors: Satoshi TANAKA, Kazuo WATANABE, Tetsuaki ADACHI, Masahito NUMANAMI, Yasuhisa YAMAMOTO
  • Publication number: 20170019082
    Abstract: Provided is a power amplification module that includes: an amplification transistor that has a constant power supply voltage supplied to a collector thereof, a bias current supplied to a base thereof and that amplifies an input signal input to the base thereof and outputs an amplified signal from the collector thereof; a first current source that outputs a first current that corresponds to a level control voltage that is for controlling a signal level of the amplified signal; and a bias transistor that has the first current supplied to a collector thereof, a bias control voltage connected to a base thereof and that outputs the bias current from an emitter thereof.
    Type: Application
    Filed: July 5, 2016
    Publication date: January 19, 2017
    Inventors: Shota Ishihara, Yusuke Shimamune, Takashi Soga, Fuminori Morisawa, Seiko Ono, Tetsuaki Adachi
  • Patent number: 8295057
    Abstract: In a semiconductor device such as a high-frequency power amplifier module, a plurality of amplifying means are formed on a semiconductor chip which is mounted on a main surface of a wiring substrate, and electrodes of the semiconductor chip are electrically connected by wires to electrodes of the wiring substrate. In order to make the high-frequency power amplifier module small in size, a substrate-side bonding electrode electrically connected to a wire set at a fixed reference electric potential is place at a location farther from a side of the semiconductor chip than a substrate-side output electrode electrically connected to an output wire. A substrate-side input electrode electrically connected to an input wire is located at a distance from the side of the semiconductor chip about equal to the distance from the side of the semiconductor chip to the substrate-side output electrode, or at a location farther from the side of the semiconductor chip than the substrate-side bonding electrode is.
    Type: Grant
    Filed: May 25, 2010
    Date of Patent: October 23, 2012
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Iwamichi Kohjiro, Yasuhiro Nunogawa, Sakae Kikuchi, Shizuo Kondo, Tetsuaki Adachi, Osamu Kagaya, Kenji Sekine, Eiichi Hase, Kiichi Yamashita