Abstract: In an information processing system including an operand accessing unit for accessing a main memory to read an operand for a current instruction, the operand accessing unit comprises a mode flip-flop for holding a mode signal in response to a decoded signal supplied from an instruction analyzing memory. The mode signal indicates that whether or not a particular one of instructions of a second kind is executed by an executing unit as the current instruction. Connected to a control storage unit, a memory access mode register holds a memory access mode bit indicative of a memory access mode which defines an access mode for the main memory. The memory access mode bit is renewed by a processed signal supplied from the control storage unit. A predetermined access mode register holds a predetermined access mode bit indicative of a predetermined access mode.

Abstract: A data processing apparatus includes a control storage, a first storage, a second storage, an address storage, an identifying section, an executing section, a saving section, a holding section, a selecting section, and an exception handler. A first type instruction realized by a microprogram stored in the control storage and a second type instruction realized by an instruction program constituted by first type instructions are identified. When this identification result indicates a second type instruction, the data processing apparatus causes the second type instruction to be executed by first type instructions constituting instruction program for the second type instruction. When an exception occurs during the execution of this instruction program, the data processing apparatus can process the exception by using the address of the second type instruction saved in the saving section.