Patents by Inventor Tetsuji Moku
Tetsuji Moku has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7675076Abstract: A light-emitting device has a main semiconductor region formed via an n-type AlInGaN buffer region on a p-type silicon substrate, the latter being sufficiently electroconductive to provide part of the current path through the device. Constituting the primary working part of the LED, the main semiconductor region comprises an n-type GaN layer, an active layer, and a p-type GaN layer, which are successively epitaxially grown in that order on the buffer region. A heterojunction is created between p-type substrate and n-type buffer region. Carrier transportation from substrate to buffer region is expedited by the interface levels of the heterojunction, with a consequent reduction of the drive voltage requirement of the LED.Type: GrantFiled: March 15, 2006Date of Patent: March 9, 2010Assignee: Sanken Electric Co., Ltd.Inventors: Koji Otsuka, Tetsuji Moku, Junji Sato, Yoshiki Tada, Takashi Yoshida
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Patent number: 7671375Abstract: A light-emitting diode is built on a silicon substrate which has been doped with a p-type impurity to possess sufficient conductivity to provide part of the current path through the LED. The p-type silicon substrate has epitaxially grown thereon a buffer region of n-type AlInGaN. Further grown epitaxially on the buffer region is the main semiconductor region of the LED which comprises a lower confining layer of n-type GaN, an active layer for generating light, and an upper confining layer of p-type GaN. In the course of the growth of the buffer region and main semiconductor region there occurs a thermal diffusion of gallium and other Group III elements from the buffer region into the p-type silicon substrate, with the consequent creation of a p-type low-resistance region in the substrate. Interface levels are created across the heterojunction between p-type silicon substrate and n-type buffer region.Type: GrantFiled: March 17, 2006Date of Patent: March 2, 2010Assignee: Sanken Electric Co., Ltd.Inventors: Koji Otsuka, Tetsuji Moku, Junji Sato, Yoshiki Tada, Takashi Yoshida
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Patent number: 7569870Abstract: A semiconductor device having nitride semiconductor layers has a buffer layer (2) in the form of alternations of a first sublayer (8) of AlN and a second layer (9) of GaN with interposition of a third layer (10) of p-type GaN therebetween. On this buffer layer there is grown a main semiconductor region (3) having nitride semiconductor layers for providing a high-electron-mobility transistor or the like. From 0.5 to 50.0 nanometers thick, the third sublayers (10) of the buffer layer restrict the generation of two-dimensional electron gas and so prevent the buffer layer from becoming unnecessarily low in resistance.Type: GrantFiled: July 15, 2005Date of Patent: August 4, 2009Assignee: Sanken Electric Co., Ltd.Inventors: Masataka Yanagihara, Masahiro Sato, Tetsuji Moku
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Patent number: 7449727Abstract: An LED incorporating an overvoltage protector with a minimum of space requirement. The LED itself comprises a p-type semiconductor substrate, a light-generating semiconductor region grown epitaxially thereon, a first electrode on the light-generating semiconductor region, and a second electrode on the underside of the substrate. The standard method of LED fabrication is such that the substrate is notionally divisible into a main portion in register with the overlying light-generating semiconductor region and, surrounding the main portion, a tubular marginal portion needed for dicing the wafer into individual squares or dice. The overvoltage protector comprises an n-type semiconductor film formed on the marginal portion of the substrate and held against the side surfaces of the light-generating semiconductor region via an insulating film.Type: GrantFiled: January 31, 2006Date of Patent: November 11, 2008Assignee: Sanken Electric Co., Ltd.Inventors: Junji Sato, Mikio Tazima, Tetsuji Moku, Arei Niwa, Yasuhiro Kamii
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Patent number: 7446342Abstract: There is provided a semiconductor light emitting diode and a method of manufacturing the same that enable voltage in the forward direction to be decreased while allowing light extraction efficiency to be improved. This semiconductor light emitting diode is formed by a substrate, a light emitting portion that is disposed on one main surface of the substrate, a first electrode that is disposed on the light emitting portion, a pad electrode that is disposed on the first electrode, concave portions that are formed on at least a portion of the one main surface of the substrate, and a conductive layer that is formed from a conductive material that is disposed in the concave portions and reflects light emitted from the light emitting portion.Type: GrantFiled: February 8, 2006Date of Patent: November 4, 2008Assignee: Sanken Electric Co., Ltd.Inventors: Mikio Tazima, Tetsuji Moku, Junji Sato, Yasuhiro Kamii, Arei Niwa
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Patent number: 7400000Abstract: A light-emitting diode is built on a silicon substrate doped with a p-type impurity to possess sufficient conductivity to provide a current path. The p-type silicon substrate has epitaxially grown thereon two superposed buffer layers of aluminum nitride and n-type indium gallium nitride. Further grown epitaxially on the buffer layers is the main semiconductor region of the LED which comprises a lower confining layer of n-type gallium nitride, an active layer for generating light, and an upper confining layer of p-type gallium nitride. In the course of the growth of the main semiconductor region there occurs a thermal diffusion of aluminum, gallium and indium from the buffer layers into the p-type silicon substrate, with the consequent creation of an alloy layer of the diffused metals. Representing p-type impurities in the p-type silicon substrate, these metals do not create a pn junction in the substrate which causes a forward voltage drop.Type: GrantFiled: December 5, 2005Date of Patent: July 15, 2008Assignee: Sanken Electric Co., Ltd.Inventors: Koji Otsuka, Junji Sato, Tetsuji Moku, Yoshiki Tada, Takashi Yoshida
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Publication number: 20070114515Abstract: An LED is disclosed which comprises a nitride-made main semiconductor region formed on a substrate for generating light, and an electrode formed on the main semiconductor region to a thickness sufficiently small to transmit the light from the main semiconductor region. The electrode is made from a silver-base alloy, rather than from silver only, that contains an additive or additives selected to protect the electrode against oxidation and/or sulfurization and to enhance the chemical stability of the electrode without loss in contact ohmicity.Type: ApplicationFiled: January 15, 2007Publication date: May 24, 2007Applicant: Sanken Electric Co., Ltd.Inventors: Hidekazu Aoyagi, Tetsuji Matsuo, Tetsuji Moku, Mikio Tazima
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Patent number: 7202510Abstract: A first principal plane faces a second principal plane of a p-type Ga N compound semiconductor that is in contact with an MQW luminescent layer. On the surface of the first principal plane, a first region made up of the p-type Ga N compound semiconductor including at least Ni is formed. On the surface of the first region, an electrode composed of an alloy including Ni and Aluminum is formed. On the electrode, a pad electrode for external connection consisting of Al or Au is formed.Type: GrantFiled: October 13, 2005Date of Patent: April 10, 2007Assignee: Sanken Electric Co., Ltd.Inventors: Yoshiki Tada, Tetsuji Moku, Arei Niwa, Yasuhiro Kamii, Junji Sato, Takasi Kato
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Patent number: 7176480Abstract: A light-emitting diode has a low-resistivity silicon substrate on which there are laminated a buffer layer, an n-type lower confining layer, an active layer of multiple quantum well configuration, and a p-type upper confining layer. The active layer is constituted of cyclic alternations of a barrier sublayer of InGaN, a first complementary sublayer of AlGaInN, a well sublayer of InGaN, and a second complementary sublayer of AlGaInN. The proportions of the noted ingredients of the active sublayers are all specified. The first and the second complementary sublayers prevent the evaporation or diffusion of indium from the neighboring sublayers.Type: GrantFiled: May 5, 2005Date of Patent: February 13, 2007Assignee: Sanken Electric Co., Ltd.Inventors: Koji Ohtsuka, Junji Sato, Tetsuji Moku, Yoshitaka Tanaka, Mikio Tajima
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Patent number: 7173311Abstract: An overvoltage-proof light-emitting diode has a lamination of light-generating semiconductor layers on a first major surface of a silicon substrate. A front electrode in the form of a bonding pad is mounted centrally atop the light-generating semiconductor layers whereas a back electrode covers a second major surface of the substrate. An overvoltage protector, of which several different forms are disclosed, is disposed between the bonding pad and the second major surface of the substrate. The bonding pad and back electrode serves as electrodes for both LED and overvoltage protector. As seen from above the device, or in a direction normal to the first major surface of the substrate, the overvoltage protector lies substantially wholly beneath the bonding pad.Type: GrantFiled: February 2, 2005Date of Patent: February 6, 2007Assignee: Sanken Electric Co., Ltd.Inventors: Junji Sato, Koji Otsuka, Tetsuji Moku, Takashi Kato, Arei Niwa, Yasuhiro Kamii
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Publication number: 20060193355Abstract: There is provided a semiconductor light emitting diode and a method of manufacturing the same that enable voltage in the forward direction to be decreased while allowing light extraction efficiency to be improved. This semiconductor light emitting diode is formed by a substrate, a light emitting portion that is disposed on one main surface of the substrate, a first electrode that is disposed on the light emitting portion, a pad electrode that is disposed on the first electrode, concave portions that are formed on at least a portion of the one main surface of the substrate, and a conductive layer that is formed from a conductive material that is disposed in the concave portions and reflects light emitted from the light emitting portion.Type: ApplicationFiled: February 8, 2006Publication date: August 31, 2006Applicant: Sanken Electric Co., LTD.Inventors: Mikio Tazima, Tetsuji Moku, Junji Sato, Yasuhiro Kamii, Arei Niwa
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Publication number: 20060181828Abstract: An LED incorporating an overvoltage protector with a minimum of space requirement. The LED itself comprises a p-type semiconductor substrate, a light-generating semiconductor region grown epitaxially thereon, a first electrode on the light-generating semiconductor region, and a second electrode on the underside of the substrate. The standard method of LED fabrication is such that the substrate is notionally divisible into a main portion in register with the overlying light-generating semiconductor region and, surrounding the main portion, a tubular marginal portion needed for dicing the wafer into individual squares or dice. The overvoltage protector comprises an n-type semiconductor film formed on the marginal portion of the substrate and held against the side surfaces of the light-generating semiconductor region via an insulating film.Type: ApplicationFiled: January 31, 2006Publication date: August 17, 2006Applicant: Sanken Electric Co., Ltd.Inventors: Junji Sato, Mikio Tazima, Tetsuji Moku, Arei Niwa, Yasuhiro Kamii
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Publication number: 20060175628Abstract: A light-emitting diode is built on a silicon substrate which has been doped with a p-type impurity to possess sufficient conductivity to provide part of the current path through the LED. The p-type silicon substrate has epitaxially grown thereon a buffer region of n-type AlInGaN. Further grown epitaxially on the buffer region is the main semiconductor region of the LED which comprises a lower confining layer of n-type GaN, an active layer for generating light, and an upper confining layer of p-type GaN. In the course of the growth of the buffer region and main semiconductor region there occurs a thermal diffusion of gallium and other Group III elements from the buffer region into the p-type silicon substrate, with the consequent creation of a p-type low-resistance region in the substrate. Interface levels are created across the heterojunction between p-type silicon substrate and n-type buffer region.Type: ApplicationFiled: March 17, 2006Publication date: August 10, 2006Applicant: Sanken Electric Co., Ltd.Inventors: Koji Otsuka, Tetsuji Moku, Junji Sato, Yoshiki Tada, Takashi Yoshida
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Publication number: 20060157730Abstract: A light-emitting device has a main semiconductor region formed via an n-type AlInGaN buffer region on a p-type silicon substrate, the latter being sufficiently electroconductive to provide part of the current path through the device. Constituting the primary working part of the LED, the main semiconductor region comprises an n-type GaN layer, an active layer, and a p-type GaN layer, which are successively epitaxially grown in that order on the buffer region. A heterojunction is created between p-type substrate and n-type buffer region. Carrier transportation from substrate to buffer region is expedited by the interface levels of the heterojunction, with a consequent reduction of the drive voltage requirement of the LED.Type: ApplicationFiled: March 15, 2006Publication date: July 20, 2006Applicant: Sanken Electric Co., Ltd.Inventors: Koji Otsuka, Tetsuji Moku, Junji Sato, Yoshiki Tada, Takashi Yoshida
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Publication number: 20060094145Abstract: A light-emitting diode is built on a silicon substrate doped with a p-type impurity to possess sufficient conductivity to provide a current path. The p-type silicon substrate has epitaxially grown thereon two superposed buffer layers of aluminum nitride and n-type indium gallium nitride. Further grown epitaxially on the buffer layers is the main semiconductor region of the LED which comprises a lower confining layer of n-type gallium nitride, an active layer for generating light, and an upper confining layer of p-type gallium nitride. In the course of the growth of the main semiconductor region there occurs a thermal diffusion of aluminum, gallium and indium from the buffer layers into the p-type silicon substrate, with the consequent creation of an alloy layer of the diffused metals. Representing p-type impurities in the p-type silicon substrate, these metals do not create a pn junction in the substrate which causes a forward voltage drop.Type: ApplicationFiled: December 5, 2005Publication date: May 4, 2006Applicant: Sanken Electric Co., Ltd.Inventors: Koji Otsuka, Junji Sato, Tetsuji Moku, Yoshiki Tada, Takashi Yoshida
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Publication number: 20060081834Abstract: A first principal plane faces a second principal plane of a p-type Ga N compound semiconductor that is in contact with an MQW luminescent layer. On the surface of the first principal plane, a first region made up of the p-type Ga N compound semiconductor including at least Ni is formed. On the surface of the first region, an electrode composed of an alloy including Ni and Aluminum is formed. On the electrode, a pad electrode for external connection consisting of Al or Au is formed.Type: ApplicationFiled: October 13, 2005Publication date: April 20, 2006Applicant: Sanken Electric Co., Ltd.Inventors: Yoshiki Tada, Tetsuji Moku, Arei Niwa, Yasuhiro Kamii, Junji Sato, Takasi Kato
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Patent number: 6979844Abstract: A low-resistance silicon baseplate (11) has formed thereon a buffer layer 12 in the form of an alternating lamination of AlN sublayers (12a) and GaN sublayers (12b). On this buffer layer there are formed an n-type semiconductor region (13) of gallium nitride, an active layer (14) of gallium indium nitride, and a p-type semiconductor region (15) of gallium nitride, in that order. An anode (17) is formed on the p-type semiconductor region (15), and a cathode (18) on the baseplate (11).Type: GrantFiled: March 21, 2003Date of Patent: December 27, 2005Assignee: Sanken Electric Co., Ltd.Inventors: Tetsuji Moku, Kohji Ohtsuka, Masataka Yanagihara, Masaaki Kikuchi
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Publication number: 20050263791Abstract: A semiconductor device having nitride semiconductor layers has a buffer layer (2) in the form of alternations of a first sublayer (8) of AlN and a second layer (9) of GaN with interposition of a third layer (10) of p-type GaN therebetween. On this buffer layer there is grown a main semiconductor region (3) having nitride semiconductor layers for providing a high-electron-mobility transistor or the like. From 0.5 to 50.0 nanometers thick, the third sublayers (10) of the buffer layer restrict the generation of two-dimensional electron gas and so prevent the buffer layer from becoming unnecessarily low in resistance.Type: ApplicationFiled: July 15, 2005Publication date: December 1, 2005Applicant: Sanken Electric Co., Ltd.Inventors: Masataka Yanagihara, Masahiro Sato, Tetsuji Moku
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Publication number: 20050247948Abstract: A low-resistance silicon baseplate (11) has formed thereon a buffer layer 12 in the form of an alternating lamination of AlN sublayers (12a) and GaN sublayers (12b). On this buffer layer there are formed an n-type semiconductor region (13) of gallium nitride, an active layer (14) of gallium indium nitride, and a p-type semiconductor region (15) of galliumnitride, in that order. An anode (17) is formed on the p-type semiconductor region (15), and a cathode (18) on the baseplate (11).Type: ApplicationFiled: July 19, 2005Publication date: November 10, 2005Inventors: Tetsuji Moku, Kohji Ohtsuka, Masataka Yanagihara, Masaaki Kikuchi
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Publication number: 20050191778Abstract: A light-emitting diode has a low-resistivity silicon substrate on which there are laminated a buffer layer, an n-type lower confining layer, an active layer of multiple quantum well configuration, and a p-type upper confining layer. The active layer is constituted of cyclic alternations of a barrier sublayer of InGaN, a first complementary sublayer of AlGaInN, a well sublayer of InGaN, and a second complementary sublayer of AlGaInN. The proportions of the noted ingredients of the active sublayers are all specified. The first and the second complementary sublayers prevent the evaporation or diffusion of indium from the neighboring sublayers.Type: ApplicationFiled: May 5, 2005Publication date: September 1, 2005Applicant: Sanken Electric Co., Ltd.Inventors: Koji Ohtsuka, Junji Sato, Tetsuji Moku, Yoshitaka Tanaka, Mikio Tajima