Abstract: A multilayered wiring substrate, comprising: a plurality of first main surface side connecting terminals arranged in a first main surface of a stack structure; and a plurality of second main surface side connecting terminals being arranged in a second main surface of the stack structure; wherein a plurality of conductor layers are alternately formed in a plurality of stacked resin insulation layers and are operably connected to each other through via conductors tapered such that diameters thereof are widened toward the first or the second main surface, wherein a plurality of openings are formed in an exposed outermost resin insulation layer in the second main surface, and terminal outer surfaces of the second main surface side connecting terminals arranged to match with the plurality of the openings are positioned inwardly from an outer main surface of the exposed outermost resin insulation layer, and edges of terminal inner surfaces are rounded.

Abstract: Provided are a conveying jig, a method of manufacturing the conveying jig, and a method of heat-treating metal rings using the conveying jig. The conveying jig is provided with a base and ten holding shafts raised from the base. Ridges and grooves are alternatively provided in the side wall of each holding shaft. The metal rings are held in position by being engaged in the grooves in the holding shafts. The space enclosed within the holding shafts is communicated with the atmosphere, and this allows, when the metal rings held by the conveying jig are subjected to heat treatment in a heat treatment furnace, an atmospheric gas to circulate in the space enclosed within the holding shafts.

Abstract: A circuit that supplies a clock signal to a load having a clock input section capable of suppressing power consumption is disclosed. A clock generating section generates a clock signal having an amplitude corresponding to an absolute value of an electric potential difference between a lower limit of a high-level input voltage VIH and an upper limit of a low-level input voltage VIL in a load having a clock input section; a level shift section shifts an electric potential while maintaining the amplitude of the clock signal so that a high-level electric potential of the clock signal is not less than the lower limit of the high-level input voltage VIH and a low-level electric potential of the clock signal does not exceed the upper limit of the low-level input voltage VIL, and a clock signal whose electric potential is shifted is supplied to the clock input section.

Abstract: A voltage monitoring circuit includes: a ripple filter configured to output an output voltage from which a ripple component included in an input voltage, which is input from a voltage source, has been removed; a load configured to operate with the output voltage as a supply voltage and output a first signal through the operation; a comparator configured to compare an electric potential of the output voltage with an electric potential of the first signal and output a second signal when the electric potential difference is equal to or less than a predetermined threshold value; and a control circuit configured to reduce the electric potential of the first signal under the condition that the second signal is input thereto.

Abstract: A multilayer wiring substrate includes first principal surface side connection terminals arranged on a first principal surface of a stacked configuration; wherein, the first principal surface side connection terminals include an IC chip connection terminal, and a passive element connection terminal; the IC chip connection terminal is located in an opening formed in a resin insulating layer of an uppermost outer layer; the passive element connection terminal is formed of an upper terminal part formed on the resin insulating layer, and a lower terminal part located in an opening formed at a portion of an inner side of the upper terminal part in the resin insulating layer; and, wherein an upper face of the upper terminal part is higher than a reference surface, and an upper face of the IC chip connection terminal and the lower terminal part are identical in height to or lower in height than the reference surface.

Abstract: A remover contains an alkaline component, a bivalent zinc ion, a ferric ion, a chelating agent, and a nitrate ion. By using this remover, an anodized film can be selectively removed from an aluminum or aluminum-alloy member.

Abstract: A method for producing a ring core having a plurality of separate core plates with lobes defined on an inner circumferential surface thereof, the separate core plates being arranged and stacked in a ring-shaped pattern. The method includes the steps of supporting the separate core plates with either one of an inner guide member being disposed radially inwardly of the separate core plates stacked in the ring-shaped pattern and an outer guide member disposed radially outwardly of the separate core plates, and applying a pressure from the other of the inner guide member and the outer guide member, wherein the inner guide member has recesses corresponding to the lobes for positioning and supporting the lobes, and stacking the separate core plates in the ring-shaped pattern to form the ring core, while rotating the separate core plates in unison through a predetermined angle with the inner and outer guide members.

Abstract: A method includes forming a glass ribbon by heating and softening a glass plate preform and drawing the glass plate preform to a predetermined thickness in a heating furnace; and performing coring on the glass ribbon in order to form circular substrates in a straight line along a longitudinal direction of the glass ribbon.

Abstract: The present invention provides an information processing apparatus including: a first control section that, when execution of printing at a printing device connected via a communications section is instructed, performs control to display at a display section a print settings screen for making settings relating to the printing; a calculation section that calculates an estimated value of power consumption that the printing device will consume if the printing is executed on the basis of the settings relating to printing; and a second control section that, when a pre-specified operation is performed at the print settings screen, performs control to display the estimated value of power consumption and display at the display section an energy saving settings screen for making, of the settings relating to printing, settings relating to energy saving.

Abstract: Provided are a conveying jig, a method of manufacturing the conveying jig, and a method of heat-treating metal rings using the conveying jig. The conveying jig is provided with a base and ten holding shafts raised from the base. Ridges and grooves are alternatively provided in the side wall of each holding shaft. The metal rings are held in position by being engaged in the grooves in the holding shafts. The space enclosed within the holding shafts is communicated with the atmosphere, and this allows, when the metal rings held by the conveying jig are subjected to heat treatment in a heat treatment furnace, an atmospheric gas to circulate in the space enclosed within the holding shafts.

Abstract: A chamfering apparatus is used to chamfer a peripheral edge of a glass substrate. The chamfering apparatus includes a grindstone having a cylindrical hollow end portion; a grindstone driving unit that rotates the grindstone around an axis of the cylindrical hollow end portion; a substrate rotation-driving unit that rotates the glass substrate around either one of an axis of the outer periphery and an axis of the center circular hole; and a pressing unit that presses the grindstone to the glass substrate such that an annular end surface of the grindstone contacts with an edge of either one of the outer periphery and the inner periphery of the glass substrate while the cylindrical hollow end portion of the grindstone faces with one of the outer periphery and the inner periphery of the glass substrate.

Abstract: A multilayer wiring substrate includes first principal surface side connection terminals arranged on a first principal surface of a stacked configuration; wherein, the first principal surface side connection terminals include an IC chip connection terminal, and a passive element connection terminal; the IC chip connection terminal is located in an opening formed in a resin insulating layer of an uppermost outer layer; the passive element connection terminal is formed of an upper terminal part formed on the resin insulating layer, and a lower terminal part located in an opening formed at a portion of an inner side of the upper terminal part in the resin insulating layer; and, wherein an upper face of the upper terminal part is higher than a reference surface, and an upper face of the IC chip connection terminal and the lower terminal part are identical in height to or lower in height than the reference surface.

Abstract: A glass block is formed by stacking, fixing, and integrating a plurality of thin glass plates having a predetermined thickness. An annular glass block is formed by coring the glass block. Surfaces of an inside circumference and an outside circumference of the annular glass block are ground. The annular glass block of which the surfaces of the inside circumference and the outside circumference are ground are separated into individual annular glass substrates, and separated annular glass substrates are cleaned. Then, edge portions of the inside circumference and the outside circumference of a cleaned annular glass substrate are chamfered.

Abstract: A plurality of openings are formed in a resin insulation layer on a top surface side of a wiring laminate portion, and a plurality of openings are formed in a resin insulation layer on a bottom surface side thereof. A plurality of connection terminals are disposed to correspond to the openings. Peripheral portions of terminal outer surfaces of the connection terminals are covered by the resin insulation layer on the top surface side, and peripheral portions of terminal outer surfaces of the connection terminals are covered by the resin insulation layer on the bottom surface side. Each of the second-main-surface-side connection terminals has a concave portion at the center of the terminal outer surface, and the deepest portion of the concave portion is located on the interior side in relation to the peripheral portion of the terminal outer surface.

Abstract: A plurality of openings are formed in a resin insulation layer on a bottom surface side of a wiring laminate portion which constitutes a multilayer wiring substrate. A plurality of motherboard connection terminals are disposed to correspond to the openings. The motherboard connection terminals are primarily comprised of a copper layer, and peripheral portions of terminal outer surfaces thereof are covered by the outermost resin insulation layer. A dissimilar metal layer made of at least one metal which is lower in etching rate than copper is formed between an inner main surface of the outermost resin insulation layer and peripheral portions of the terminal outer surfaces.

Abstract: A multilayer wiring substrate has a multilayer wiring laminate portion in which a plurality of resin insulation layers made primarily of the same resin insulation material, and a plurality of conductive layers are laminated alternately. A plurality of first-main-surface-side connection terminals are disposed on one side of the laminate structure where a first main surface thereof is present, and a plurality of second-main-surface-side connection terminals being disposed on an other side of the laminate structure where a second main surface thereof is present. The plurality of conductive layers are formed in the plurality of resin insulation layers and interconnected by means of via conductors whose diameters increase toward the first main surface or the second main surface. The plurality of first-main-surface-side connection terminals comprising at least two types of terminals for connection of different articles-to-be-connected.

Abstract: A multilayered wiring substrate, comprising: a plurality of first main surface side connecting terminals arranged in a first main surface of a stack structure; and a plurality of second main surface side connecting terminals being arranged in a second main surface of the stack structure; wherein a plurality of conductor layers are alternately formed in a plurality of stacked resin insulation layers and are operably connected to each other through via conductors tapered such that diameters thereof are widened toward the first or the second main surface, wherein a plurality of openings are formed in an exposed outermost resin insulation layer in the second main surface, and terminal outer surfaces of the second main surface side connecting terminals arranged to match with the plurality of the openings are positioned inwardly from an outer main surface of the exposed outermost resin insulation layer, and edges of terminal inner surfaces are rounded.

Abstract: In a build-up step, a plurality of resin insulation layers and a plurality of conductive layers are alternately laminated in multilayer arrangement on a metal foil separably laminated on a side of a base material, thereby forming a wiring laminate portion. In a drilling step, a plurality of openings are formed in an outermost resin insulation layer through laser drilling so as to expose connection terminals. Subsequently, in a desmear step, smears from inside the openings are removed. In a base-material removing step performed after the build-up step, the base material is removed and the metal foil is exposed.

Abstract: A chamfering apparatus is used to chamfer a peripheral edge of a glass substrate. The chamfering apparatus includes a grindstone having a cylindrical hollow end portion; a grindstone driving unit that rotates the grindstone around an axis of the cylindrical hollow end portion; a substrate rotation-driving unit that rotates the glass substrate around either one of an axis of the outer periphery and an axis of the center circular hole; and a pressing unit that presses the grindstone to the glass substrate such that an annular end surface of the grindstone contacts with an edge of either one of the outer periphery and the inner periphery of the glass substrate while the cylindrical hollow end portion of the grindstone faces with one of the outer periphery and the inner periphery of the glass substrate.

Abstract: A method of manufacturing a disk substrate includes a disk substrate forming step of forming a disk substrate; and an outer chamfering step of chamfering an outer edge of the disk substrate. The outer chamfering step includes chamfering the outer edge by bringing an end surface of a cylindrical-shaped outer chamfering grindstone having a hollow portion on its end into contact with the outer edge such that the hollow portion faces the outer edge while rotating each of the outer chamfering grindstone and the disk substrate.