Patents by Inventor Tetsuo Yabushita

Tetsuo Yabushita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5376825
    Abstract: A single-packaged central processing unit (CPU) is formed on a substrate for a particular application in a variable word length computer system that includes a program memory. A first semiconductor chip in the CPU is of a general purpose type and includes a plurality of elements interconnected, such as an arithmetic logic unit (ALU), a program counter, and a register. A second semiconductor chip in the CPU is mounted on the first semiconductor chip with their active surfaces facing each other. The second semiconductor chip is configured for the particular application in accordance with a particular program instruction set stored in the program memory. The second semiconductor chip includes a command register for receiving fetched commands from the program memory, a command decoder for decoding the fetched commands and for generating corresponding control signals, and a timing generator for generating system clock signals.
    Type: Grant
    Filed: November 18, 1993
    Date of Patent: December 27, 1994
    Assignee: Seiko Epson Corporation
    Inventors: Takashi Tukamoto, Sachiyuki Abe, Tetsuo Yabushita, Yoshimitsu Hayashi