Patents by Inventor Tetsuo Yumoto

Tetsuo Yumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8528202
    Abstract: A molding pin for a metal die is prevented from breaking, solder is surely deposited, and thus, a circuit pitch can be reduced to the limit. On the front plane of a circuit board, prescribed circuit patterns made of a conductive material are formed, and on the rear plane, prescribed circuit patterns are also formed. On the circuit board, a through hole is formed to carry electricity between the circuit patterns on both planes. The inner shape of the through hole is narrow in a direction between the adjacent circuit patterns and wide in a circuit extending direction.
    Type: Grant
    Filed: February 17, 2005
    Date of Patent: September 10, 2013
    Assignee: Sankyo Kasei Co., Ltd.
    Inventor: Tetsuo Yumoto
  • Publication number: 20120107522
    Abstract: Disclosed is a method for producing a formed circuit component, wherein the surface of a substrate is roughened by being irradiated with laser ray instead of being etched using a chemical agent, thereby assuring sufficient adhesive strength with an electroless plating. Specifically disclosed is a method for producing a formed circuit component, which comprises: a first step of forming a substrate (1); a second step of radiating a first laser ray (2) and thereby roughening either a surface of the substrate (1) or only a circuit forming region (1a) of the substrate surface; a third step of applying a catalyst (3) to the surface of the substrate (1); a fourth step of drying the substrate (1); a fifth step of radiating a second laser ray (4), thereby lowering or eliminating the function of the catalyst (3) on a non-circuit forming region (1b); and a sixth step of electroless-plating the circuit forming region (1a) of the substrate surface.
    Type: Application
    Filed: July 6, 2010
    Publication date: May 3, 2012
    Applicant: SANKYO KASEI CO., LTD.
    Inventor: Tetsuo Yumoto
  • Publication number: 20090000951
    Abstract: An electroconductive circuit, in which a masking material and a substrate both have low dielectric loss tangent to high-frequency signal and have excellent adhesion to each other, can be formed in a simple and low-cost manner. A cycloolefin resin with a flexible polymer mixed and dispersed therein is injection molded to form a primary substrate 1, and a cycloolefin resin having compatibility in which a flexible polymer has not been mixed, is injection molded on the surface of the primary substrate 1 to form a masking layer 2. Since the cycloolefin resin itself has etching resistance, for only the surface of the primary substrate 1 not covered with the masking layer 2, that is, only a part 1a on which an electroconductive circuit is to be formed, the flexible polymer can be dissolved for roughening and only the part 1a can be rendered hydrophilic. Accordingly, an electroconductive layer 4 can be selectively formed by electroless plating only onto the part 1a not covered with the masking layer 2.
    Type: Application
    Filed: January 23, 2007
    Publication date: January 1, 2009
    Inventor: Tetsuo Yumoto
  • Publication number: 20070200554
    Abstract: A molding pin for a metal die is prevented from breaking, solder is surely deposited, and thus, a circuit pitch can be reduced to the limit. On the front plane of a circuit board, prescribed circuit patterns made of a conductive material are formed, and on the rear plane, prescribed circuit patterns are also formed. On the circuit board, a through hole is formed to carry electricity between the circuit patterns on both planes. The inner shape of the through hole is narrow in a direction between the adjacent circuit patterns and wide in a circuit extending direction.
    Type: Application
    Filed: August 31, 2006
    Publication date: August 30, 2007
    Inventor: Tetsuo Yumoto
  • Patent number: 6588099
    Abstract: A molded circuit board is formed by a process comprising the steps of: molding liquid crystal polymer of plating grade into a primary molded member which outline corresponds to the dimensions of the molded circuit board; roughening the surface of the primary molded member; molding a secondary molded member by coating the primary molded member with oxyalkylene-containing poly(vinyl alcohol) resin over the surface thereof except for a portion thereof on which a circuit is to be formed; heating the first and secondary molded members; applying catalyst to the portion of the surface of the primary molded member not covered by the secondary molded member; heating the first and secondary molded members in hot water to elute the secondary molded member; and chemically plating the catalyst-applied-portion to form the circuit thereon, by which the size of the molded circuit board is minimized with simple procedures and production cost reduced.
    Type: Grant
    Filed: January 22, 2001
    Date of Patent: July 8, 2003
    Assignee: Sankyo Kasei Kabushiki Kaisha
    Inventor: Tetsuo Yumoto
  • Publication number: 20030017719
    Abstract: After forming a conductive layer on the entire surface of an insulation substrate, a resin mask of poly lactic acid etc. resin which will hydrolyze in an alkali aqueous solution is integrally formed on the insulation substrate so that a part to which a conductive layer of a predetermined pattern is to be formed is exposed. Then, a conductive layer is overlaid on the part exposed from the resin mask by means of electrolytic plating using an acidic bath composition. The interface between the resin mask of poly lactic acid etc. resin and the conductive layer reproduces an accurate contour of the pattern. Thereafter, the resin mask is efficiently removed by hydrolysis using an alkali aqueous solution, and finally the conductive layer is removed by chemical etching to thereby form a conductive layer having the predetermined pattern on the surface of the insulation substrate.
    Type: Application
    Filed: July 9, 2001
    Publication date: January 23, 2003
    Applicant: SANKYO KASEI KABUSHIKI KAISHA
    Inventor: Tetsuo Yumoto
  • Patent number: 6498115
    Abstract: After forming a conductive layer on the entire surface of an insulation substrate, a resin mask of poly lactic acid etc. resin which will hydrolyze in an alkali aqueous solution is integrally formed on the insulation substrate so that a part to which a conductive layer of a predetermined pattern is to be formed is exposed. Then, a conductive layer is overlaid on the part exposed from the resin mask by means of electrolytic plating using an acidic bath composition. The interface between the resin mask of poly lactic acid etc. resin and the conductive layer reproduces an accurate contour of the pattern. Thereafter, the resin mask is efficiently removed by hydrolysis using an alkali aqueous solution, and finally the conductive layer is removed by chemical etching to thereby form a conductive layer having the predetermined pattern on the surface of the insulation substrate.
    Type: Grant
    Filed: July 9, 2001
    Date of Patent: December 24, 2002
    Assignee: Sankyo Kasei Kabushiki Kaisha
    Inventor: Tetsuo Yumoto
  • Publication number: 20020138978
    Abstract: A molded circuit board is formed by a process comprising the steps of: molding liquid crystal polymer of plating grade into a primary product that has an outline corresponding to the dimensions of said molded circuit board; roughening the surface of said primary product; molding a secondary molded member to produce a secondary product by coating said primary molded member with oxyalkylene-containing poly(vinyl alcohol) resin over almost the entire surface thereof except for a circuit area on which a circuit is to be formed; heating said secondary product; applying catalyst to said circuit area where portions of surface of said primary molded member are not covered with said secondary molded member; heating said secondary product in hot water to elute the secondary molded member into hot water; and chemically plating the catalyst-applied-area to form a circuit thereon. This process minimizes the size of the molded circuit board, simplifies the procedure and thus reduce the production cost.
    Type: Application
    Filed: January 22, 2001
    Publication date: October 3, 2002
    Applicant: SANKYO KASEI KABUSHIKI KAISHA
    Inventor: Tetsuo Yumoto
  • Patent number: 6036901
    Abstract: An electronic part having a complicated internal configuration is integrally molded without dividing the configuration into a plurality of sections, thereby reducing the cost and improving the quality of the electronic part.
    Type: Grant
    Filed: December 17, 1997
    Date of Patent: March 14, 2000
    Assignee: Sankyo Kasei Kabushiki Kaisha
    Inventor: Tetsuo Yumoto
  • Patent number: 6015523
    Abstract: An electronic part, which has a complicated internal configuration and has a movable part rotatably and movably accommodated therein, is integrally molded without dividing the configuration into a plurality of sections to carry out a number of molding operations for separate sections of the electronic part, thereby reducing the cost and enhancing the quality of the electronic part.
    Type: Grant
    Filed: December 18, 1997
    Date of Patent: January 18, 2000
    Assignee: Sankyo Kasei Kabushiki Kaisha
    Inventor: Tetsuo Yumoto
  • Patent number: 5979048
    Abstract: A method of simultaneously manufacturing a plurality of connectors involves:molding a resin to form a connector member assembly containing multiple connector members, each member having one or two opposite longitudinally elongated through-holes extending between front and rear faces of the member along opposite sides thereof;forming a first metal coating on the front and rear faces and on an inner surface of each through-hole;providing metal-platable and non-metal-platable regions on each first-metal-coated front and rear face;forming a second metal coating on the metal-platable regions to form conductive patterns and on each first-metal-plated inner surface to form a conductive inner surface;removing the first metal coating from the non-metal-platable regions to form non-conductive patterns;then detaching each connector member from the connector assembly, each detached member having one or two side faces containing the metal-plated inner surface of the one or two through-holes; andremoving the first and seco
    Type: Grant
    Filed: March 7, 1997
    Date of Patent: November 9, 1999
    Assignees: Polyplastics, Co., Inc., Sankyoukasei Co., Ltd
    Inventors: Yoshiaki Nishikawa, Tetsuo Yumoto
  • Patent number: 5057650
    Abstract: A molded circuit component for connecting to lead wires includes body and a protective cover. The body includes a partition wall area having a plurality of housing grooves, partition walls, body notches, positioning projections and fastening pin reception apertures. The protective cover includes a plurality of cover notches, recesses and fastening pins to correspond respectively with the body notches, positioning projections and fastening pin reception apertures. Metal lines having connection terminals on their ends are embedded in the housing grooves. Lead wires are positioned in the grooves so that the conductors of the lead wires are placed on, and attached to, the connection terminals. The protective cover is then attached to the body.
    Type: Grant
    Filed: August 2, 1990
    Date of Patent: October 15, 1991
    Assignees: Sumitomo Electric Industries, Ltd., Matsushita Electric Industrial Co., Ltd., Sankyo Kasei Co., Ltd.
    Inventors: Kenichi Urushibata, Kiyoto Sugawara, Tatsuo Matsuda, Haruo Saen, Keiichi Kojima, Syusaku Kawasaki, Hiroshi Hatase, Katsuya Saito, Tetsuo Yumoto, Norio Yoshizawa, Tooru Kanno
  • Patent number: 5045641
    Abstract: A molded electrical connector for connecting electrical conductors comprises a molding section in which a plurality of metallic circuits are arranged in parallel with one another at predetermined intervals and are fixedly molded with resin such that first end portions of the metallic circiuts are exposed as connecting terminals. The molded electrical connector further comprises a connecting section which comprises the connecting terminals. The connecting section is molded with resin simultaneously when the molding section is formed. Electrical conductors are placed on the connecting terminals of the metallic circuits and welded together.
    Type: Grant
    Filed: January 23, 1990
    Date of Patent: September 3, 1991
    Assignees: Sankyo Kasei Co., Ltd., Sumitomo Electric Industries, Ltd.
    Inventors: Kenichi Urushibata, Keiichi Kojima, Kiyoto Sugawara, Tatsuo Matsuda, Haruo Saen, Tetsuo Yumoto, Norio Yoshizawa, Tooru Kanno
  • Patent number: 5015519
    Abstract: This invention relates to a partially plated molded article and to a process for the production of a molded article which is partially plated with metal such as circuit boards, connectors, decorative articles, etc., where a catalyst such as palladium, gold, etc. is added after roughening of the surface of a primary molded article, and then, the molded article is inserted into the mold and a secondary article molded thereabout so that the portions to be plated with metal are exposed, and after such molding, the exposed portions are plated with metal. Alternatively, the catalyst may be applied after molding of the secondary article around the roughened primary molded article.
    Type: Grant
    Filed: October 16, 1989
    Date of Patent: May 14, 1991
    Assignee: Sankyo Kasei Kabushiki Kaisha
    Inventor: Tetsuo Yumoto
  • Patent number: 4908259
    Abstract: This invention relates to a partially plated molded article and to a process for the production of a molded article which is partially plated with metal such as circuit boards, connectors, decorative articles, etc., where a catalyst such as palladium, gold, etc. is added after the roughing of the surface of the primary molded article, and then, the molded article is inserted into the mold and molded so that the portions to be plated with metal are exposed, and after such molding, the exposed portions are plated with metal.
    Type: Grant
    Filed: April 13, 1988
    Date of Patent: March 13, 1990
    Assignee: Sankyo Kasei Kabushiki Kaisha
    Inventor: Tetsuo Yumoto
  • Patent number: 4812353
    Abstract: A process for the production of a molded article such as a circuit board and the like includes applying catalyst such as palladium, gold, etc. to a primary molded article after roughening of its surfaces, then, after such pre-treatment, the primary molded article is set into a mold to form a secondary molded article covered with cover material only leaving a portion to be subjected to metal plating, and then the secondary molded article is removed from the mold and subjected to metal plating, and finally the cover material is removed after metal plating.
    Type: Grant
    Filed: October 15, 1987
    Date of Patent: March 14, 1989
    Assignee: Sankyo Kasei Kabushiki Kaisha
    Inventor: Tetsuo Yumoto
  • Patent number: 4812275
    Abstract: This invention relates to a process for the production of a molded article partially plated with metal as in the case of circuit boards, connectors, decorative articles, etc., where a catalyst such as palladium, gold, etc. is added after roughening of the surface of the primary molded article, and then, the molded article is inserted into the mold and molded so that the portions to be plated with metal are exposed outwardly, and after such molding, the secondary molded material is plated with metal.
    Type: Grant
    Filed: October 15, 1987
    Date of Patent: March 14, 1989
    Assignee: Sankyo Kasei Kabushiki Kaisha
    Inventor: Tetsuo Yumoto