Patents by Inventor Tetsuro Sugioka

Tetsuro Sugioka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9444662
    Abstract: In a contention avoidance control device and a contention avoidance control method for PWM output and A/D conversion, the change timings of PWM outputs are detected, and output of a received A/D conversion trigger to an A/D conversion circuit is inhibited within a predetermined time measured based on the change timings.
    Type: Grant
    Filed: July 17, 2015
    Date of Patent: September 13, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Katsuyuki Imamura, Tetsuro Sugioka
  • Publication number: 20150326415
    Abstract: In a contention avoidance control device and a contention avoidance control method for PWM output and A/D conversion, the change timings of PWM outputs are detected, and output of a received A/D conversion trigger to an A/D conversion circuit is inhibited within a predetermined time measured based on the change timings.
    Type: Application
    Filed: July 17, 2015
    Publication date: November 12, 2015
    Inventors: Katsuyuki IMAMURA, Tetsuro SUGIOKA
  • Patent number: 7957544
    Abstract: The potential of a smoothing capacitor for a speaker is smoothly changed by controlling the potential with use of a PWM signal and switching between outputting the PWM signal and an actual audio signal, thereby suppressing a pop sound. The scale of circuitry is reduced and cost is lowered by implementing a PWM circuit in a one-chip microcontroller. Noise is eliminated by outputting a pulse that has been divided in the PWM signal generation stage.
    Type: Grant
    Filed: November 7, 2006
    Date of Patent: June 7, 2011
    Assignee: Panasonic Corporation
    Inventors: Kazuki Adachi, Tetsuro Sugioka, Kiyomi Kimura
  • Patent number: 7425673
    Abstract: In a tone output device 100, an oscillator 102 outputs a clock 141 that is emitted by a crystal resonator. A multiplication circuit 103 outputs a clock 142 that is generated by multiplying the clock 141. A timing control circuit 104 outputs a timing signal 150 generated based on the clock 142 for operations of a CPU 105. The CPU 105 operates in sync with the timing signal 150. The DA converter 115 operates in sync with a signal generated based on the clock 141. The timing adjustment circuit 114 detects deviation of the clock 142 from the clock 141 resulting from frequency jitter of the clock 142, and prevents occurrence of clock racing.
    Type: Grant
    Filed: October 20, 2006
    Date of Patent: September 16, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kosei Fujisaka, Tetsuro Sugioka, Kazuki Adachi, Kiyomi Kimura, Tsuyoshi Takayama
  • Publication number: 20070293175
    Abstract: The voltage on the most sensitive noise sensing line that is thin and long inside in terms of layout and is near the power supply line or the ground line is captured by use of the system clock. A layout fixing logic constituted by a flip-flop is provided, and only when the voltage on the noise sensing line is changed due to noise or the like, first sensing data is outputted at low level from the layout fixing logic. Noise immunity characteristics can be improved by changing the circuit operation of the memory by the first sensing data.
    Type: Application
    Filed: May 30, 2007
    Publication date: December 20, 2007
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Tetsuro SUGIOKA, Sueko WATANABE, Kenji MURAKAMI
  • Publication number: 20070121962
    Abstract: The potential of a smoothing capacitor for a speaker is smoothly changed by controlling the potential with use of a PWM signal and switching between outputting the PWM signal and an actual audio signal, thereby suppressing a pop sound. The scale of circuitry is reduced and cost is lowered by implementing a PWM circuit in a one-chip microcontroller. Noise is eliminated by outputting a pulse that has been divided in the PWM signal generation stage.
    Type: Application
    Filed: November 7, 2006
    Publication date: May 31, 2007
    Inventors: Kazuki Adachi, Tetsuro Sugioka, Kiyomi Kimura
  • Publication number: 20070101854
    Abstract: In a tone output device 100, an oscillator 102 outputs a clock 141 that is emitted by a crystal resonator. A multiplication circuit 103 outputs a clock 142 that is generated by multiplying the clock 141. A timing control circuit 104 outputs a timing signal 150 generated based on the clock 142 for operations of a CPU 105. The CPU 105 operates in sync with the timing signal 150. The DA converter 115 operates in sync with a signal generated based on the clock 141. The timing adjustment circuit 114 detects deviation of the clock 142 from the clock 141 resulting from frequency jitter of the clock 142, and prevents occurrence of clock racing.
    Type: Application
    Filed: October 20, 2006
    Publication date: May 10, 2007
    Inventors: Kosei Fujisaka, Tetsuro Sugioka, Kazuki Adachi, Kiyomi Kimura, Tsuyoshi Takayama