Abstract: To realize a software radio processing with a reduced circuit area by hardware and software which can process transmission and reception, or synchronization and demodulation in time division. There are provided a circuit DRC that can dynamically change a configuration with a structure that can change the configuration at a high speed, a general processor, and an interface for connection with an external device such as an AD converter or a DA converter. Software radio is realized by using a software radio chip that conducts plural different processing such as transmission and reception, or synchronization and demodulation in time division. The different processing during the radio signal processing can be conducted in time division. As a result, the software radio can be realized with a circuit of a reduced area in a software radio system that allocates regions of an FPGA to the respective processing.

Abstract: When a peripheral LSI has a memory space which is other than the memory space of a CPU, access is made without one of the memory spaces being aware of the other memory spaces. A flexible bus controller BSC makes address translation according to information on the relation between addresses of both memory spaces. The invention assures wider latitude in CPU type selection and makes it easy to reuse an existing program or develop a new program.

Abstract: A multi processor (107) includes a plurality of processor elements (103, 104, 105) and has a processing portion (210) capable of executing an application software and serving to carry out a process for determining a task to be assigned to the processor elements at a request given from the application software. The processing portion determines the task to be assigned to the processor elements at the request given from the application software. For task scheduling in the multi processor, consequently, it is possible to enhance a flexibility for an application software.

Abstract: An automatic upgrading method in which, when software is downloaded and upgraded to change a specification of a software defined radio system on a vehicular system, convenience to a user who receives services using wireless communication is not reduced and error operations of the vehicular system is inhibited, is provided. A state in which a vehicle is not used is the most appropriate for the upgrade. It is determined whether a key is removed. When the key is removed, the download is executed using wireless communications. After that, a software defined radio system and a car navigation system are stopped. The upgrade and test operation are executed. When the test result is good, the software defined radio system and the car navigation system are restarted.

Abstract: The present invention relates to data access to a built-in memory or a peripheral circuit from any of ALU cells provided in the array state, and provides a semiconductor integrated circuit having an access mechanism enabling size reduction in the hardware scale and improvement in the usability. There are provided dedicated cell groups 1304, 1306 for executing memory access processing to built-in memories 1313, 1312 in a plurality of ALU cells. Further there are provided dedicated cell groups 1304, 1306 enabling access commonly available for built-in memories to a peripheral circuit 1201 or LSI external device 206. By providing dedicated cell groups for memory access processing to built-in memories, the ALU cell does not require a memory access mechanism, which enables reduction of an area and improvement in efficiency in use. Further access common to the built-in memories or peripheral circuits is possible, which enables improvement in the usability.

Abstract: To realize a software radio processing with a reduced circuit area by hardware and software which can process transmission and reception, or synchronization and demodulation in time division. There are provided a circuit DRC that can dynamically change a configuration with a structure that can change the configuration at a high speed, a general processor, and an interface for connection with an external device such as an AD converter or a DA converter. Software radio is realized by using a software radio chip that conducts plural different processing such as transmission and reception, or synchronization and demodulation in time division. The different processing during the radio signal processing can be conducted in time division. As a result, the software radio can be realized with a circuit of a reduced area in a software radio system that allocates regions of an FPGA to the respective processing.

Abstract: A programmable peripheral LSI contains a number of microprocessor peripheral IPs. A switch is provided for selectively disabling peripheral IPs. As a result, the peripheral IPs are disabled while they are not used. An improved system design method uses an evaluation board provided with the programmable peripheral LSI.

Abstract: When a peripheral LSI has a memory space which is other than the memory space of a CPU, access is made without one of the memory spaces being aware of the other memory spaces. A flexible bus controller BSC makes address translation according to information on the relation between addresses of both memory spaces. The invention assures wider latitude in CPU type selection and makes it easy to reuse an existing program or develop a new program.

Abstract: A method of extracting timing characteristics from transistor circuit data of modularity design products (a module) such as a CPU core in which the extracted timing characteristics are used for the timing verification of a circuit including a module to be extracted and timing constraints when logical synthesis or timing-driven layout is made. Particularly, since conditions fit for a timing rule of the module are included in timing characteristics when timing verification is executed by simulation, verification free of pseudo error is enabled. Also, the configuration of a timing characteristic library, a storage medium storing it and an LSI designing method using the storage medium are provided.

Abstract: Disclosed herein is a peripheral LSI containing a number of microprocessor peripheral IPs. Even when the peripheral IPs are integrated, this peripheral LSI can prevent the package price from rising, the power consumption from increasing, and the software designers from being perplexed. A switch of the programmable peripheral LSI is provided for electrically disabling peripheral IPs. As a result, the peripheral IPs are disabled while they are not used.