Patents by Inventor Tetsuya Iwamura

Tetsuya Iwamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for using dynamic random access memory and flash memory
    Patent number: 7136978
    Abstract: A system and method are provided for using dynamic random access memory and flash memory. In one example, the memory system comprises a nonvolatile memory; synchronous dynamic random access memories; circuits including a control circuit which is coupled with the nonvolatile memory and the synchronous dynamic random access memories, and controls accesses to the nonvolatile memory and the synchronous dynamic random access memories; and a plurality of input/output terminals coupled with the circuits, wherein in data transfer from the nonvolatile memory to the synchronous dynamic random access memories, error corrected data is transferred.
    Type: Grant
    Filed: May 28, 2003
    Date of Patent: November 14, 2006
    Assignee: Renesas Technology Corporation
    Inventors: Seiji Miura, Kazushige Ayukawa, Tetsuya Iwamura
  • Semiconductor device with non-volatile memory and random access memory
    Patent number: 6928512
    Abstract: A non-volatile memory, an SRAM, a DRAM and a control circuit are module-formed into a single packaged. The control circuit assigns addresses to the SRAM and addresses to the DRAM and data necessary to be held for a long period of time is saved in the SRAM. Two chips of DRAM are mapped to the same address space and refreshed alternately. The plural chips are arranged such that they are mutually laminated, and they are wired by means of a BGA or inter-chip bonding.
    Type: Grant
    Filed: June 6, 2002
    Date of Patent: August 9, 2005
    Assignees: Hitachi ULSI Systems Co, Ltd., Renesas Technology Corporation
    Inventors: Kazushige Ayukawa, Seiji Miura, Tetsuya Iwamura, Kouichi Hoshi, Yoshikazu Saitou
  • System and method for using dynamic random access memory and flash memory
    Publication number: 20040049629
    Abstract: A system and method are provided for using dynamic random access memory and flash memory. In one example, the memory system comprises a nonvolatile memory; synchronous dynamic random access memories; circuits including a control circuit which is coupled with the nonvolatile memory and the synchronous dynamic random access memories, and controls accesses to the nonvolatile memory and the synchronous dynamic random access memories; and a plurality of input/output terminals coupled with the circuits, wherein in data transfer from the nonvolatile memory to the synchronous dynamic random access memories, error corrected data is transferred.
    Type: Application
    Filed: May 28, 2003
    Publication date: March 11, 2004
    Applicants: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Seiji Miura, Kazushige Ayukawa, Tetsuya Iwamura
  • Semiconductor device with non-volatile memory and random access memory
    Publication number: 20020199056
    Abstract: A non-volatile memory, an SRAM, a DRAM and a control circuit are module-formed into a single packaged. The control circuit assigns addresses to the SRAM and addresses to the DRAM and data necessary to be held for a long period of time is saved in the SRAM. Two chips of DRAM are mapped to the same address space and refreshed alternately. The plural chips are arranged such that they are mutually laminated, and they are wired by means of a BGA or inter-chip bonding.
    Type: Application
    Filed: June 7, 2002
    Publication date: December 26, 2002
    Applicant: Hitachi, Ltd. and Hitachi ULSI Systems Co., Ltd.
    Inventors: Kazushige Ayukawa, Seiji Miura, Tetsuya Iwamura, Kouichi Hoshi, Yoshikazu Saitou