Patents by Inventor Tetsuya Matsuura

Tetsuya Matsuura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130292641
    Abstract: To provide a semiconductor device including a functional laminate having flatness and crystallinity improved by effectively passing on the crystallinity and flatness improved in a buffer to the functional laminate, and to provide a method of producing the semiconductor device; in the semiconductor device including the buffer and the functional laminate having a plurality of nitride semiconductor layers, the functional laminate includes a first n-type or i-type AlxGa1-xN layer (0?x<1) on the buffer side, and an AlzGa1-zN adjustment layer containing p-type impurity, which has an approximately equal Al composition to the first AlxGa1-xN layer (x?0.05?z?x+0.05, 0?z<1) is provided between the buffer and the functional laminate.
    Type: Application
    Filed: July 2, 2013
    Publication date: November 7, 2013
    Applicant: Dowa Electronics Materials Co., Ltd.
    Inventors: Yoshikazu OOSHIKA, Tetsuya MATSUURA
  • Publication number: 20130247962
    Abstract: A solar panel unit is provided. The solar panel unit includes at least one solar panel, at least one support member configured to support the solar panel through at least on rotation shaft, and an actuator unit including at least one air bag capable of extending and contracting according to an internal pressure, and configured to rotate the solar panel around an axis of the rotation shaft according to extension and contraction of the air bag.
    Type: Application
    Filed: November 29, 2011
    Publication date: September 26, 2013
    Applicant: DAIKIN INDUSTRIES, LTD.
    Inventors: Toshiyuki Sakai, Tetsuya Matsuura
  • Patent number: 8426461
    Abstract: The present invention provides a preparation with improved disintegration property, a preparation showing improved bioavailability of a medicament, production methods thereof and the like. A rapidly disintegrating preparation comprising granules comprising a medicament coated with a coating layer containing sugar or sugar alcohol; and a disintegrant. A production method of a rapidly disintegrating preparation including a step of producing granules comprising a medicament, a step of forming a coating layer containing sugar or sugar alcohol on the obtained granules and a step of mixing the coated granules with a disintegrant and molding the mixture.
    Type: Grant
    Filed: June 8, 2012
    Date of Patent: April 23, 2013
    Assignee: Takeda Pharmaceutical Company Limited
    Inventors: Yutaka Tanoue, Tetsuya Matsuura, Yutaka Yamagata, Naoki Nagahara
  • Publication number: 20130060052
    Abstract: The present invention provides a preparation with improved disintegration property, a preparation showing improved bioavailability of a medicament, production methods thereof and the like. A rapidly disintegrating preparation comprising granules comprising a medicament coated with a coating layer containing sugar or sugar alcohol; and a disintegrant. A production method of a rapidly disintegrating preparation including a step of producing granules comprising a medicament, a step of forming a coating layer containing sugar or sugar alcohol on the obtained granules and a step of mixing the coated granules with a disintegrant and molding the mixture.
    Type: Application
    Filed: July 25, 2012
    Publication date: March 7, 2013
    Inventors: Yutaka Tanoue, Tetsuya Matsuura, Yutaka Yamagata, Naoki Nagahara
  • Publication number: 20120326209
    Abstract: To provide a semiconductor device including a functional laminate having flatness and crystallinity improved by effectively passing on the crystallinity and flatness improved in a buffer to the functional laminate, and to provide a method of producing the semiconductor device; in the semiconductor device including the buffer and the functional laminate having a plurality of nitride semiconductor layers, the functional laminate includes a first n-type or i-type AlxGa1-xN layer (0?x<1) on the buffer side, and an AlzGa1-zN adjustment layer containing p-type impurity, which has an approximately equal Al composition to the first AlxGa1-xN layer (x?0.05?z?x+0.05, 0?z<1) is provided between the buffer and the functional laminate.
    Type: Application
    Filed: March 1, 2011
    Publication date: December 27, 2012
    Applicant: DOWA ELECTRONICS MATERIALS CO., LTD.
    Inventors: Yoshikazu Ooshika, Tetsuya Matsuura
  • Publication number: 20120282191
    Abstract: The present invention provides a preparation with improved disintegration property, a preparation showing improved bioavailability of a medicament, production methods thereof and the like. A rapidly disintegrating preparation comprising granules comprising a medicament coated with a coating layer containing sugar or sugar alcohol; and a disintegrant. A production method of a rapidly disintegrating preparation including a step of producing granules comprising a medicament, a step of forming a coating layer containing sugar or sugar alcohol on the obtained granules and a step of mixing the coated granules with a disintegrant and molding the mixture.
    Type: Application
    Filed: January 16, 2012
    Publication date: November 8, 2012
    Inventors: Yutaka Tanoue, Tetsuya Matsuura, Yutaka Yamagata, Naoki Nagahara
  • Publication number: 20120248387
    Abstract: The method according to the present invention includes a first step of supplying the Group V source gas at a flow rate B1 (0<B1) and supplying the gas containing magnesium at a flow rate C1 (0<C1) while supplying the Group III source gas at a flow rate A1 (0?A1); and a second step of supplying a Group V source gas at a flow rate B2 (0<B2) and supplying a gas containing magnesium at a flow rate C2 (0<C2) while supplying a Group III source gas at a flow rate A2 (0<A2). The first step and the second step are repeated a plurality of times to form a p-AlxGa1-xN (0?x<1) layer, and the flow rate A1 is a flow rate which allows no p-AlxGa1-xN layer to grow and satisfies A1?0.5A2.
    Type: Application
    Filed: December 10, 2010
    Publication date: October 4, 2012
    Applicant: DOWA ELECTRONICS MATERIALS CO., LTD.
    Inventors: Yoshikazu Ooshika, Tetsuya Matsuura
  • Patent number: 8278822
    Abstract: A light-emitting element comprising a substrate; a light-emitting layer disposed above the substrate and emitting a primary light; and, a reflective film disposed between the substrate and the light-emitting layer and formed by at least one layer that reflects the primary light, in which the light-emitting element further comprises a light dispersing multilayered film disposed between the substrate and the reflective film and formed by two or more types of light dispersing layers, and the light dispersing multilayered film multiple-disperses a secondary light into plural wavelengths and discharges the secondary light, which is excited by the primary light passing through the reflective film.
    Type: Grant
    Filed: June 5, 2009
    Date of Patent: October 2, 2012
    Assignee: Dowa Electronics Materials Co., Ltd.
    Inventors: Masatoshi Iwata, Norio Tasaki, Yoshiyuki Kobayashi, Tetsuya Matsuura
  • Publication number: 20120244223
    Abstract: The present invention provides a preparation with improved disintegration property, a preparation showing improved bioavailability of a medicament, production methods thereof and the like. A rapidly disintegrating preparation comprising granules comprising a medicament coated with a coating layer containing sugar or sugar alcohol; and a disintegrant. A production method of a rapidly disintegrating preparation including a step of producing granules comprising a medicament, a step of forming a coating layer containing sugar or sugar alcohol on the obtained granules and a step of mixing the coated granules with a disintegrant and molding the mixture.
    Type: Application
    Filed: June 8, 2012
    Publication date: September 27, 2012
    Inventors: Yutaka Tanoue, Tetsuya Matsuura, Yutaka Yamagata, Naoki Nagahara
  • Publication number: 20120175589
    Abstract: A nitride semiconductor device is provided, in which a superlattice strain buffer layer using AlGaN layers having a low Al content or GaN layers is formed with good flatness, and a nitride semiconductor layer with good flatness and crystallinity is formed on the superlattice strain buffer layer. A nitride semiconductor device includes a substrate; an AlN strain buffer layer made of AlN formed on the substrate; a superlattice strain buffer layer formed on the AlN strain buffer layer; and a nitride semiconductor layer formed on the superlattice strain buffer layer, and is characterized in that the superlattice strain buffer layer has a superlattice structure formed by alternately stacking first layers made of AlxGa1?xN (0?x?0.25), which further contain p-type impurity, and second layers made of AlN.
    Type: Application
    Filed: August 23, 2010
    Publication date: July 12, 2012
    Applicant: DOWA ELECTRONICS MATERIALS CO., LTD.
    Inventors: Yoshikazu Ooshika, Tetsuya Matsuura
  • Publication number: 20110115359
    Abstract: A light-emitting element comprising a substrate; a light-emitting layer disposed above the substrate and emitting a primary light; and, a reflective film disposed between the substrate and the light-emitting layer and formed by at least one layer that reflects the primary light, in which the light-emitting element further comprises a light dispersing multilayered film disposed between the substrate and the reflective film and formed by two or more types of light dispersing layers, and the light dispersing multilayered film multiple-disperses a secondary light into plural wavelengths and discharges the secondary light, which is excited by the primary light passing through the reflective film.
    Type: Application
    Filed: June 5, 2009
    Publication date: May 19, 2011
    Applicant: DOWA ELECTRONICS MATERIALS CO., LTD.
    Inventors: Masatoshi Iwata, Norio Tasaki, Yoshiyuki Kobayashi, Tetsuya Matsuura
  • Patent number: 7487646
    Abstract: A head-side inflow/outflow unit (60) and a foot-side inflow/outflow unit (70), which have a respective outlet opening (61, 71) for providing a supply of conditioned air to a sleeping compartment (11) within a capsule main body (20) and a respective inlet opening (62, 72), associated with the outlet opening (61, 71), for drawing in internal air of the sleeping compartment (11), are provided. The air-conditioning capacity of conditioned air supplied through each of the outlet openings (61, 71) is controlled such that the temperature of conditioned air supplied through the outlet opening (61) of the head-side inflow/outflow unit (60) falls below the temperature of conditioned air supplied through the outlet opening (71) of the foot-side inflow/outflow unit (70).
    Type: Grant
    Filed: February 5, 2003
    Date of Patent: February 10, 2009
    Assignee: Daikin Industries, Ltd.
    Inventors: Junji Matsushima, Tetsuya Matsuura
  • Publication number: 20050199736
    Abstract: A head-side inflow/outflow unit (60) and a foot-side inflow/outflow unit (70), which have a respective outlet opening (61, 71) for providing a supply of conditioned air to a sleeping compartment (11) within a capsule main body (20) and a respective inlet opening (62, 72), associated with the outlet opening (61, 71), for drawing in internal air of the sleeping compartment (11), are provided. The air-conditioning capacity of conditioned air supplied through each of the outlet openings (61, 71) is controlled such that the temperature of conditioned air supplied through the outlet opening (61) of the head-side inflow/outflow unit (60) falls below the temperature of conditioned air supplied through the outlet opening (71) of the foot-side inflow/outflow unit (70).
    Type: Application
    Filed: February 5, 2003
    Publication date: September 15, 2005
    Inventors: Junji Matsushima, Tetsuya Matsuura
  • Patent number: 6852571
    Abstract: Flux is supplied to the surface of each land by a flux supplying apparatus. A solder ball having a predetermined size is supplied onto a land by using a ball supplying apparatus. A memory IC is disposed on a logic IC and each of a plurality of external leads comes into contact with a predetermined position in each of a plurality of corresponding lands. By performing predetermined heat treatment, the solder ball is melted to bond each external lead and each land with each other. After that, the melted solder is cooled down, the bonded portion is formed, and a stacked semiconductor device in which the memory IC is stacked on the logic IC is completed. In such a manner, a stacked semiconductor device in which external leads of a semiconductor device body are bonded to electrodes on a substrate securely is obtained.
    Type: Grant
    Filed: September 5, 2003
    Date of Patent: February 8, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Tetsuya Matsuura, Tomoaki Hashimoto
  • Patent number: 6798056
    Abstract: A semiconductor module includes a substrate having a pad electrode on a surface, a lower layer semiconductor package mounted on the substrate, and an upper layer semiconductor package mounted on the substrate while arranged in a position substantially overlying the former. The pad electrodes connected to the leads of these semiconductor packages are arranged alternately. The lead has a dambar residual portion. An inner surface of a lead downward portion of the upper layer semiconductor package is positioned outside an outer surface of a lead downward portion of the lower layer semiconductor package.
    Type: Grant
    Filed: August 30, 2002
    Date of Patent: September 28, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Tetsuya Matsuura, Yasushi Kasatani, Kazunari Michii
  • Publication number: 20040180471
    Abstract: Flux is supplied to the surface of each land by a flux supplying apparatus. A solder ball having a predetermined size is supplied onto a land by using a ball supplying apparatus. A memory IC is disposed on a logic IC and each of a plurality of external leads comes into contact with a predetermined position in each of a plurality of corresponding lands. By performing predetermined heat treatment, the solder ball is melted to bond each external lead and each land with each other. After that, the melted solder is cooled down, the bonded portion is formed, and a stacked semiconductor device in which the memory IC is stacked on the logic IC is completed. In such a manner, a stacked semiconductor device in which external leads of a semiconductor device body are bonded to electrodes on a substrate securely is obtained.
    Type: Application
    Filed: September 5, 2003
    Publication date: September 16, 2004
    Applicant: RENESAS TECHNOLOGY CORP.
    Inventors: Tetsuya Matsuura, Tomoaki Hashimoto
  • Publication number: 20040159925
    Abstract: In a semiconductor device, a first semiconductor including a substrate, and a semiconductor chip disposed on the major surface of the substrate and sealed with a resin; a wiring board; spacers disposed between the wiring board and the substrate; and a second semiconductor. At this time, the second semiconductor is electrically connected to the wiring board and disposed in the space formed by the wiring board, the substrate, and the spacer. The spacer is disposed so as to the first semiconductor to the wiring board electrically.
    Type: Application
    Filed: July 29, 2003
    Publication date: August 19, 2004
    Applicant: RENESAS TECHNOLOGY CORP.
    Inventors: Tetsuya Matsuura, Kazunari Michii, Jun Shibata, Koji Bando
  • Patent number: 6777798
    Abstract: A stacked semiconductor device structure comprising: a plurality of semiconductor modules each of which includes a substrate and at least one semiconductor device mounted on the substrate; a stacking device for stacking the semiconductor modules on one another; and a surface mount device for surface mounting on a further substrate for a system appliance the semiconductor modules stacked on one another by the stacking device.
    Type: Grant
    Filed: March 4, 2003
    Date of Patent: August 17, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Takakazu Fukumoto, Muneharu Tokunaga, Tetsuya Matsuura
  • Patent number: 6717275
    Abstract: A plurality of substrates are stacked on top of each other. A flexible cable serially connects the substrates. Semiconductor packages are mounted on the surfaces of the substrates. An adhesive material bonds adjoining semiconductor packages and holds the semiconductor packages in place with respect to each other. The bottommost substrate is provided with external leads by which the semiconductor module is mounted on the motherboard.
    Type: Grant
    Filed: April 30, 2002
    Date of Patent: April 6, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Tetsuya Matsuura, Yasushi Kasatani, Tadashi Ichimasa
  • Patent number: 6670701
    Abstract: A semiconductor module achieving higher density of the semiconductor module itself as well as of being disposed in an area-efficient manner relative to another electronic component, such as a mother board and the like. The semiconductor module includes a mounting substrate having, on an underside, a solder ball for connecting to an interconnection of a mother board and semiconductor packages mounted in multiple layers on the top side of the mounting substrate and connected to electrodes on the mounting substrate.
    Type: Grant
    Filed: December 4, 2001
    Date of Patent: December 30, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tetsuya Matsuura, Yasushi Kasatani, Kazunari Michii, Hajime Maeda