Patents by Inventor Tetuo Kawakita

Tetuo Kawakita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5739053
    Abstract: A process wherein substrate preliminary formed with bumps by electrolytic plating or other technique is prepared. The semiconductor device is opposed to the substrate with the bumps so that the Al electrodes of the semiconductor device are aligned with respect to the bumps and brought into contact with each other. Then, the Al electrodes of the semiconductor device and the bumps are bonded together by the application of pressure and heat with an Au--Al alloy layer formed therebetween. Subsequently, the bumps are peeled off the substrate so as to be transferred to the respective Al electrodes. Thereafter, the semiconductor device is opposed to a circuit board so that the bumps are aligned with respect to the electrodes of wiring and brought into contact with them.
    Type: Grant
    Filed: May 15, 1995
    Date of Patent: April 14, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tetuo Kawakita, Kenzo Hatada