Patents by Inventor Theodore Antonakopoulos

Theodore Antonakopoulos has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9672910
    Abstract: A memory system for storing data in a plurality N of memory chips. The memory system includes a number K of sets of memory chips, wherein each set of the K sets includes a number M of the memory chips, with N=K·M; and one signal processing unit having a number L of signal processing engines for signal processing data of the N memory chips and having a data link interface for interfacing each of the K sets.
    Type: Grant
    Filed: April 9, 2014
    Date of Patent: June 6, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Theodore Antonakopoulos, Nikolaos Papandreou, Charalampos Pozidis
  • Patent number: 9477540
    Abstract: A multi-stage codeword detector for detecting codewords from read signals received from a multi-level memory device, includes a first detection stage configured for a coarse detection of a first codeword from a received read signal; a second detection stage configured for a fine detection of a second codeword from the received read signal; and a deciding entity configured to decide on using the second detection stage for the received read signal in dependence on a reliability indicator indicating a certain reliability level of the received read signal.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: October 25, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Theodore Antonakopoulos, Thomas Mittelholzer, Nikolaos Papandreou, Charalampos Pozidis
  • Publication number: 20150149816
    Abstract: A multi-stage codeword detector for detecting codewords from read signals received from a multi-level memory device, includes a first detection stage configured for a coarse detection of a first codeword from a received read signal; a second detection stage configured for a fine detection of a second codeword from the received read signal; and a deciding entity configured to decide on using the second detection stage for the received read signal in dependence on a reliability indicator indicating a certain reliability level of the received read signal.
    Type: Application
    Filed: September 25, 2014
    Publication date: May 28, 2015
    Inventors: Theodore Antonakopoulos, Thomas Mittelholzer, Nikolaos Papandreou, Charalampos Pozidis
  • Publication number: 20140325124
    Abstract: A memory system for storing data in a plurality N of memory chips. The memory system includes a number K of sets of memory chips, wherein each set of the K sets includes a number M of the memory chips, with N=K·M; and one signal processing unit having a number L of signal processing engines for signal processing data of the N memory chips and having a data link interface for interfacing each of the K sets.
    Type: Application
    Filed: April 9, 2014
    Publication date: October 30, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Theodore Antonakopoulos, Nikolaos Papandreou, Charalampos Pozidis
  • Patent number: 8495471
    Abstract: Systems and methods are provided that confront the problem of failed storage integrated circuits (ICs) in a solid state drive (SSD) by using a fault-tolerant architecture along with one error correction code (ECC) mechanism for random/burst error corrections and an L-fold interleaving mechanism. The systems and methods described herein keep the SSD operational when one or more integrated circuits fail and allow the recovery of previously stored data from failed integrated circuits and allow random/burst errors to be corrected in other operational integrated circuits. These systems and methods replace the failed integrated circuits with fully functional/operational integrated circuits treated herein as spare integrated circuits. Furthermore, these systems and methods improve I/O performance in terms of maximum achievable read/write data rate.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: July 23, 2013
    Assignee: International Business Machines Corporation
    Inventors: Theodore A. Antonakopoulos, Roy D. Cideciyan, Evangelos S. Eleftheriou, Robert Haas, Xiao-Yu Hu, Ilias Iliadis
  • Patent number: 8214718
    Abstract: A system and method for erasure flagging for errors-and-erasures decoding in storage devices includes determining a deviation measure between a read/write head position relative to a track of symbols in storage media. A reliability value is determined for the symbols based on the deviation measure. Flagging the symbols with a reliability value below a threshold as erasures is performed. The symbols are decoded using errors-and-erasures decoding in an iterative procedure.
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: July 3, 2012
    Assignee: International Business Machines Corporation
    Inventors: Theodore A. Antonakopoulos, Charalampos Pozidis, Maria Varsamou
  • Patent number: 8190970
    Abstract: A probe-based data storage device includes a storage surface having an array of A storage fields; a probe array comprising A probes for writing data to respective storage fields; and an apparatus for controlling writing of blocks of user data in the array of storage fields.
    Type: Grant
    Filed: October 27, 2007
    Date of Patent: May 29, 2012
    Assignee: International Business Machines Corporation
    Inventors: Thomas Albrecht, Theodore Antonakopoulos, Giovanni Cherubinni, Ajay Dholakia, Evangelos S. Eleftheriou, Charalampos Pozidis
  • Patent number: 8032814
    Abstract: Methods and apparatus are provided for controlling writing and reading of data in an array of A storage fields of a probe-based data storage device in which data is written to and read from the array of storage fields by a corresponding array of probes. One method provides error-tolerance by exploiting the inherent parallelism of the probe storage array. A user data block to be written to the A-field array is first coded to produce a plurality of C-byte codewords, such that r·C=k1A where r is the number of codewords and k1 is an integer greater than or equal to 1. A sub-blocks of k1 bytes are produced from the codewords by selecting successive bytes of each sub-block cyclically from the r codewords. The A sub-blocks are then written via respective probes to the corresponding storage fields of the storage field array.
    Type: Grant
    Filed: October 27, 2007
    Date of Patent: October 4, 2011
    Assignee: International Business Machines Corporation
    Inventors: Thomas Albrecht, Theodore Antonakopoulos, Giovanni Cherubinni, Ajay Dholakia, Evangelos S. Eleftheriou, Charalampos Pozidis
  • Patent number: 8028218
    Abstract: Methods and apparatus are provided for controlling writing and reading of data in an array of A storage fields of a probe-based data storage device in which data is written to and read from the array of storage fields by a corresponding array of probes. One method provides error-tolerance by exploiting the inherent parallelism of the probe storage array. A user data block to be written to the A-field array is first coded to produce a plurality of C-byte codewords, such that r·C=k1A where r is the number of codewords and k1 is an integer greater than or equal to 1. A sub-blocks of k1 bytes are produced from the codewords by selecting successive bytes of each sub-block cyclically from the r codewords. The A sub-blocks are then written via respective probes to the corresponding storage fields of the storage field array.
    Type: Grant
    Filed: October 27, 2007
    Date of Patent: September 27, 2011
    Assignee: International Business Machines Corporation
    Inventors: Thomas Albrecht, Theodore Antonakopoulos, Giovanni Cherubinni, Ajay Dholakia, Evangelos S. Eleftheriou, Charalampos Pozidis
  • Publication number: 20110131472
    Abstract: Systems and methods are provided that confront the problem of failed storage integrated circuits (ICs) in a solid state drive (SSD) by using a fault-tolerant architecture along with one error correction code (ECC) mechanism for random/burst error corrections and an L-fold interleaving mechanism. The systems and methods described herein keep the SSD operational when one or more integrated circuits fail and allow the recovery of previously stored data from failed integrated circuits and allow random/burst errors to be corrected in other operational integrated circuits. These systems and methods replace the failed integrated circuits with fully functional/operational integrated circuits treated herein as spare integrated circuits. Furthermore, these systems and methods improve I/O performance in terms of maximum achievable read/write data rate.
    Type: Application
    Filed: November 30, 2009
    Publication date: June 2, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Theodore A. Antonakopoulos, Roy D. Cideciyan, Evangelos S. Eleftheriou, Robert Haas, Xiao-Yu Hu, Ilias Iliadis
  • Patent number: 7646693
    Abstract: A method and apparatus for overwriting data in a probe-based data storage device wherein data is represented by the presence and absence of pits formed in a storage surface by a probe of the device is provided. Input data is first coded such that successive bits of a given value x in the coded input data (b0, b1, b2, . . . ,) are separated by at least d bits of the complementary value {tilde over (x)}, where d is a predetermined number?2. Overwrite data bits (v0, v1, v2, . . . ,) are then generated by encoding the coded input data bits (b0, b1, b2, . . . ,).
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: January 12, 2010
    Assignee: International Business Machines Corporation
    Inventors: Theodore Antonakopoulos, Evangelos S. Eleftheriou, Haris Pozidis
  • Publication number: 20090319866
    Abstract: A system and method for erasure flagging for errors-and-erasures decoding in storage devices includes determining a deviation measure between a read/write head position relative to a track of symbols in storage media. A reliability value is determined for the symbols based on the deviation measure. Flagging the symbols with a reliability value below a threshold as erasures is performed. The symbols are decoded using errors-and-erasures decoding in an iterative procedure.
    Type: Application
    Filed: June 19, 2008
    Publication date: December 24, 2009
    Inventors: Theodore A. Antonakopoulos, Charalampos Pozidis, Maria Varsamou
  • Publication number: 20080304379
    Abstract: Methods and apparatus are provided for controlling writing and reading of data in an array of A storage fields of a probe-based data storage device in which data is written to and read from the array of storage fields by a corresponding array of probes. One method uses the concept of sub-arrays to provide variable-rate read/write operation. Input data blocks are received for writing to the A-field array, each input data block being writable in A/k0 storage fields where k0 is an integer>=2. For successive groups of k0 blocks, the k0 blocks are written to respective sub-arrays, each of A/k0 storage fields, of the storage field array by selectively writing at one of a series of rates, ranging from 1 block at a time to k0 blocks at a time, in dependence on a desired data write-rate. The blocks can also be read from the sub-arrays by selectively reading at one of a series of rates, ranging from 1 sub-array at a time to k0 sub-arrays at a time, in dependence on a desired data read-rate.
    Type: Application
    Filed: July 16, 2007
    Publication date: December 11, 2008
    Applicant: International Business Machines Corporation
    Inventors: Thomas Albrecht, Theodore Antonakopoulos, Giovanni Cherubini, Ajay Dholakia, Evangelos S. Eleftheriou, Charalampos Pozidis
  • Patent number: 7389468
    Abstract: Methods and apparatus are provided for controlling writing and reading of data in an array of A storage fields of a probe-based data storage device in which data is written to and read from the array of storage fields by a corresponding array of probes. One method provides error-tolerance by exploiting the inherent parallelism of the probe storage array. A user data block to be written to the A-field array is first coded to produce a plurality of C-byte codewords, such that r.C=k1.A where r is the number of codewords and k1 is an integer?1. A sub-blocks of k1 bytes are produced from the codewords by selecting successive bytes of each sub-block cyclically from the r codewords. The A sub-blocks are then written via respective probes to the corresponding storage fields of the storage field array.
    Type: Grant
    Filed: September 20, 2004
    Date of Patent: June 17, 2008
    Assignee: International Business Machines Corporation
    Inventors: Thomas Albrecht, Theodore Antonakopoulos, Giovanni Cherubini, Ajay Dholakia, Evangelos S. Eleftheriou, Charalampos Pozidis
  • Publication number: 20080052602
    Abstract: Methods and apparatus are provided for controlling writing and reading of data in an array of A storage fields of a probe-based data storage device in which data is written to and read from the array of storage fields by a corresponding array of probes. One method provides error-tolerance by exploiting the inherent parallelism of the probe storage array. A user data block to be written to the A-field array is first coded to produce a plurality of C-byte codewords, such that r.C=k1.A where r is the number of codewords and k1 is an integer?1. A sub-blocks of k1 bytes are produced from the codewords by selecting successive bytes of each sub-block cyclically from the r codewords. The A sub-blocks are then written via respective probes to the corresponding storage fields of the storage field array.
    Type: Application
    Filed: October 27, 2007
    Publication date: February 28, 2008
    Applicant: International Business Machines Corporation
    Inventors: Thomas Albrecht, Theodore Antonakopoulos, Giovanni Cherubini, Ajay Dholakia, Evangelos Eleftheriou, Charalampos Pozidis
  • Publication number: 20080052476
    Abstract: A probe-based data storage device includes a storage surface having an array of A storage fields; a probe array comprising A probes for writing data to respective storage fields; and an apparatus for controlling writing of blocks of user data in the array of storage fields.
    Type: Application
    Filed: October 27, 2007
    Publication date: February 28, 2008
    Applicant: International Business Machines Corporation
    Inventors: Thomas Albrecht, Theodore Antonakopoulos, Giovanni Cherubini, Ajay Dholakia, Evangelos Eleftheriou, Charalampos Pozidis
  • Publication number: 20080052601
    Abstract: Methods and apparatus are provided for controlling writing and reading of data in an array of A storage fields of a probe-based data storage device in which data is written to and read from the array of storage fields by a corresponding array of probes. One method provides error-tolerance by exploiting the inherent parallelism of the probe storage array. A user data block to be written to the A-field array is first coded to produce a plurality of C-byte codewords, such that r.C=k1A where r is the number of codewords and k1 is an integer greater than or equal to 1. A sub-blocks of k1 bytes are produced from the codewords by selecting successive bytes of each sub-block cyclically from the r codewords. The A sub-blocks are then written via respective probes to the corresponding storage fields of the storage field array.
    Type: Application
    Filed: October 27, 2007
    Publication date: February 28, 2008
    Applicant: International Business Machines Corporation
    Inventors: Thomas Albrecht, Theodore Antonakopoulos, Giovanni Cherubini, Ajay Dholakia, Evangelos Eleftheriou, Charalampos Pozidis
  • Patent number: 7257691
    Abstract: Methods and apparatus are provided for controlling writing and reading of data in an array of A storage fields of a probe-based data storage device in which data is written to and read from the array of storage fields by a corresponding array of probes. One method uses the concept of sub-arrays to provide variable-rate read/write operation. Input data blocks are received for writing to the A-field array, each input data block being writable in A/k0 storage fields where k0 is an integer ?2. For successive groups of k0 blocks, the k0 blocks are written to respective sub-arrays, each of A/k0 storage fields, of the storage field array by selectively writing at one of a series of rates, ranging from 1 block at a time to k0 blocks at a time, in dependence on a desired data write-rate. The blocks can also be read from the sub-arrays by selectively reading at one of a series of rates, ranging from 1 sub-array at a time to k0 sub-arrays at a time, in dependence on a desired data read-rate.
    Type: Grant
    Filed: September 20, 2004
    Date of Patent: August 14, 2007
    Assignee: International Business Machines Corporation
    Inventors: Thomas Albrecht, Theodore Antonakopoulos, Giovanni Cherubini, Ajay Dholakia, Evangelos S. Eleftheriou, Charalampos Pozidis
  • Patent number: 7245575
    Abstract: Methods and apparatus are provided for overwriting data in a probe-based data storage device in which data bits are represented by the presence and absence of pits at bit positions on a storage surface, the pits being formed in the storage surface by a probe mechanism of the device. Input data is coded to generate a coded bit sequence and an overwrite technique is employed to record the coded bit sequence on the storage surface over an old, previously-recorded bit sequence. Together with the properties of the coded bit sequence, the overwrite technique exploits the physical mechanism of the write process in that, with appropriate spacing of the bit positions on the storage surface, writing a pit at a bit position can erase an existing pit within a defined number of neighboring bit positions.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: July 17, 2007
    Assignee: International Business Machines Corporation
    Inventors: Theodore Antonakopoulos, Evangelos Eleftheriou, Charalampos Pozidis
  • Publication number: 20060072420
    Abstract: Methods and apparatus are provided for controlling writing and reading of data in an array of A storage fields of a probe-based data storage device in which data is written to and read from the array of storage fields by a corresponding array of probes. One method uses the concept of sub-arrays to provide variable-rate read/write operation. Input data blocks are received for writing to the A-field array, each input data block being writable in A/k0 storage fields where k0 is an integer ?2. For successive groups of k0 blocks, the k0 blocks are written to respective sub-arrays, each of A/k0 storage fields, of the storage field array by selectively writing at one of a series of rates, ranging from 1 block at a time to k0 blocks at a time, in dependence on a desired data write-rate. The blocks can also be read from the sub-arrays by selectively reading at one of a series of rates, ranging from 1 sub-array at a time to k0 sub-arrays at a time, in dependence on a desired data read-rate.
    Type: Application
    Filed: September 20, 2004
    Publication date: April 6, 2006
    Inventors: Thomas Albrecht, Theodore Antonakopoulos, Giovanni Cherubini, Ajay Dholakia, Evangelos Eleftheriou, Charalampos Pozidis