Abstract: Systems and methods for audience interaction in real-time multimedia applications are provided. In one embodiment, a method for a real-time video conference comprises, during the real-time video conference, receiving a media stream including audio and video from a remote computing system over a network, acquiring, video and audio of a user, detecting an event with a machine learning model in at least one of the video and the audio of the user, and transmitting an event detection message indicating the detected event and/or audio and video of the user to the remote computing system over the network. In this way, natural audience reactions may be automatically detected and shared.

Abstract: Systems and methods for audience interaction in real-time multimedia applications are provided. In one embodiment, a method for a real-time video conference comprises, during the real-time video conference, receiving a media stream including audio and video from a remote computing system over a network, acquiring, video and audio of a user, detecting an event with a machine learning model in at least one of the video and the audio of the user, and transmitting an event detection message indicating the detected event and/or audio and video of the user to the remote computing system over the network. In this way, natural audience reactions may be automatically detected and shared.

Abstract: Aspects of the embodiments are directed to systems, methods, and apparatuses to determine transmission equalization coefficients (TxEQs) for one or more lanes of a high speed serial link. Embodiments include determining a jitter tolerance for each TxEQ of a plurality of TxEQs for a lane of the link. The jitter tolerance for each TxEQ for the lane is based on a level of jitter induced on the lane to detect a number of errors on the lane; determining a voltage (VOC) margin for each TxEQ for the lane, wherein the voltage margin for the lane is based on a voltage corners test applied to the lane to detect a number of errors on the lane at a high voltage point and a low voltage point; determining a TxEQ that provides maximum jitter tolerance and based on the determined lowest voltage margin; and using the TxEQ for the lane during operation.

Abstract: In some embodiments, a chip comprises control circuitry to provide inband signals, inband output ports, and transmitters to transmit the inband signals to the inband output ports. The control circuitry selectively includes loopback initiating commands in the inband signals. Other embodiments are described and claimed.

Abstract: A method for recovering a clock signal communicated on a system bus. The method includes receiving at a receiver a first signal having a first polarity and receiving at the receiver a second signal having an opposite polarity to the first signal. The method also includes generating at the receiver a first clock signal based upon the first signal and the second signal.

Abstract: An apparatus including an integrated circuit including a plurality of devices and signal circuitry coupled to the plurality of devices, and a package substrate including a first surface coupled to the integrated circuit, a second surface having a plurality of externally accessible contact points coupled to the signal circuitry, and a continuous layer of conductive material coupled to a reference signal of the integrated circuit and disposed over an area of the second surface and electrically isolated from the contact points.

Abstract: In some embodiments, a chip includes first and second nodes, a variable voltage source, and transmitter and control circuitry. The transmitter includes a driver coupled to the first and second nodes, and first and second resistive structures coupled between the first and second nodes, respectively, and the variable voltage source. The control circuitry selects an impedance level for the first and second resistive structures, and detect coupling of a remote receiver to the transmitter through interconnects and detect decoupling of the remote receiver from the transmitter. Other embodiments are described and claimed.

Abstract: A method including routing a signal from a memory device on an integrated circuit in a package to a memory module, and returning the signal to a reference line in the package between the memory module and the integrated circuit. Also, a method including providing a memory module including at least one memory package configured for electrically coupling to a bus on a system board, the at least one memory package comprising an integrated circuit including a plurality of memory devices, and a package substrate including a surface having a plurality of externally accessible contact points coupled to the memory devices and an externally accessible reference signal line and a surface of the package, and tuning the electrical characteristics of the memory package using an electrical potential between the contact points and the reference signal line.

Abstract: A method for recovering a clock signal communicated on a system bus. The method includes receiving at a receiver a first signal having a first polarity and receiving at the receiver a second signal having an opposite polarity to the first signal. The method also includes generating at the receiver a first clock signal based upon the first signal and the second signal.

Abstract: An apparatus comprising an integrated circuit comprising a plurality of memory devices and signal circuitry coupled to the plurality of memory devices, and a package substrate comprising a first surface coupled to the integrated circuit, a second surface having a plurality of externally accessible contact points coupled to the signal circuitry, and an externally accessible reference signal line disposed between the integrated circuit and the second surface.

Abstract: An apparatus including an integrated circuit including a plurality of devices and signal circuitry coupled to the plurality of devices, and a package substrate including a first surface coupled to the integrated circuit, a second surface having a plurality of externally accessible contact points coupled to the signal circuitry, and a continuous layer of conductive material coupled to a reference signal of the integrated circuit and disposed over an area of the second surface and electrically isolated from the contact points.

Abstract: A method for recovering a clock signal communicated on a system bus. The method includes receiving at a receiver a first signal having a first polarity and receiving at the receiver a second signal having an opposite polarity to the first signal. The method also includes generating at the receiver a first clock signal based upon the first signal and the second signal.

Abstract: An apparatus including an integrated circuit including a plurality of devices and signal circuitry coupled to the plurality of devices, and a package substrate including a first surface coupled to the integrated circuit, a second surface having a plurality of externally accessible contact points coupled to the signal circuitry, and a continuous layer of conductive material coupled to a reference signal of the integrated circuit and disposed over an area of the second surface and electrically isolated from the contact points.

Abstract: An apparatus including an integrated circuit including a plurality of devices and signal circuitry coupled to the plurality of devices, and a package substrate including a first surface coupled to the integrated circuit, a second surface having a plurality of externally accessible contact points coupled to the signal circuitry, and a continuous layer of conductive material coupled to a reference signal of the integrated circuit and disposed over an area of the second surface and electrically isolated from the contact points.

Abstract: A method including routing a signal from a memory device on an integrated circuit in a package to a memory module, and returning the signal to a reference line in the package between the memory module and the integrated circuit. Also, a method including providing a memory module including at least one memory package configured for electrically coupling to a bus on a system board, the at least one memory package comprising an integrated circuit including a plurality of memory devices, and a package substrate including a surface having a plurality of externally accessible contact points coupled to the memory devices and an externally accessible reference signal line and a surface of the package, and tuning the electrical characteristics of the memory package using an electrical potential between the contact points and the reference signal line.

Abstract: An apparatus comprising an integrated circuit comprising a plurality of memory devices and signal circuitry coupled to the plurality of memory devices, and a package substrate comprising a first surface coupled to the integrated circuit, a second surface having a plurality of externally accessible contact points coupled to the signal circuitry, and an externally accessible reference signal line disposed between the integrated circuit and the second surface.