Patents by Inventor Thibaut Maurice
Thibaut Maurice has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20100164048Abstract: The disclosure provides a method for fabricating a semiconductor substrate comprising the steps of: providing a semiconductor on insulator type substrate, providing a diffusion barrier layer and providing a second semiconductor layer. By providing the diffusion barrier layer, it becomes possible to suppress diffusion from the highly doped first semiconductor layer into the second semiconductor layer. The invention also relates to a corresponding semiconductor substrate and opto-electronic devices comprising such a substrate.Type: ApplicationFiled: December 22, 2009Publication date: July 1, 2010Applicant: S.O.I.TEC Silicon on Insulator TechnologiesInventors: Christophe Figuet, Christophe Bouvier, Céline Cailler, Alexis Drouin, Thibaut Maurice
-
Patent number: 7256103Abstract: The invention relates to a method for manufacturing a compound material wafer. The technique includes forming a weakened zone in a source substrate, attaching the source substrate to a handle substrate to form a source-handle assembly, and thermally annealing the source-handle assembly to further weaken the weakened zone. The method also includes holding the assembly at a holding temperature, and detaching the source substrate from the assembly at the weakened zone at the holding temperature. The holding temperature is greater than room temperature but does not promote further weakening of the weakened zone.Type: GrantFiled: November 9, 2004Date of Patent: August 14, 2007Assignee: S.O.I.Tec Silicon on Insulator TechnologiesInventors: Thibaut Maurice, Phuong Nguyen, Eric Guiot
-
Patent number: 7217639Abstract: The invention relates to a method for manufacturing a material compound wafer by forming a predetermined splitting area in a source substrate; attaching the source substrate to a handle substrate to form an assembly; heating the assembly for weakening the predetermined splitting area; and determining a degree of weakening of the predetermined splitting area which evidences the physical strength of the predetermined splitting area during or after heating to detect anomalies that may lead to damage of the source substrate, handle or assembly. The degree of weakening is advantageously determined in-situ and may be determined continuously or periodically during the heating. The invention further relates to an apparatus for thermal annealing device used in the manufacturing process of a material compound wafer.Type: GrantFiled: December 3, 2004Date of Patent: May 15, 2007Assignee: S.O.I. Tec Silicon on Insulator Technologies S.A.Inventors: Thibaut Maurice, Eric Guiot
-
Publication number: 20070105246Abstract: The invention relates to a device for use in a method for manufacturing a material compound wafer by forming a predetermined splitting area in a source substrate; attaching the source substrate to a handle substrate to form an assembly; heating the assembly for weakening the predetermined splitting area; and determining a degree of weakening of the predetermined splitting area which evidences the physical strength of the predetermined splitting area during or after heating to detect anomalies that may lead to damage of the source substrate, handle or assembly. The device is includes an annealing device for thermally annealing the assembly; and a measuring device for determining the degree of weakening of the predetermined splitting area during or after thermal annealing to detect anomalies that may lead to damage of the source substrate, handle or assembly. The degree of weakening is advantageously determined in-situ and may be determined continuously or periodically during the heating.Type: ApplicationFiled: December 28, 2006Publication date: May 10, 2007Applicant: S.O.I.Tec Silicon on Insulator Technologies S.A.Inventors: Thibaut Maurice, Eric Guiot
-
Patent number: 7022586Abstract: The present invention relates to a method for recycling a substrate that has a residue on its surface and a detachment profile resulting from an implantation process. The method includes removing the residue from the substrate to a level substantially equivalent to that of the detachment profile, thus obtaining a substantially uniform planar surface on the substrate, and then polishing the entire surface of the substrate to eliminate defects.Type: GrantFiled: December 3, 2003Date of Patent: April 4, 2006Assignee: S.O.I.Tec Silicon on Insulator Technologies S.A.Inventors: Christophe Maleville, Fabrice Letertre, Thibaut Maurice, Carlos Mazure, Fredéric Metral
-
Publication number: 20050277267Abstract: The invention relates to a method for manufacturing a compound material wafer. The technique includes forming a weakened zone in a source substrate, attaching the source substrate to a handle substrate to form a source-handle assembly, and thermally annealing the source-handle assembly to further weaken the weakened zone. The method also includes holding the assembly at a holding temperature, and detaching the source substrate from the assembly at the weakened zone at the holding temperature. The holding temperature is greater than room temperature but does not promote further weakening of the weakened zone.Type: ApplicationFiled: November 9, 2004Publication date: December 15, 2005Inventors: Thibaut Maurice, Phuong Nguyen, Eric Guiot
-
Publication number: 20050277269Abstract: The invention relates to a method for manufacturing a material compound wafer by forming a predetermined splitting area in a source substrate; attaching the source substrate to a handle substrate to form an assembly; heating the assembly for weakening the predetermined splitting area; and determining a degree of weakening of the predetermined splitting area which evidences the physical strength of the predetermined splitting area during or after heating to detect anomalies that may lead to damage of the source substrate, handle or assembly. The degree of weakening is advantageously determined in-situ and may be determined continuously or periodically during the heating. The invention further relates to an apparatus for thermal annealing device used in the manufacturing process of a material compound wafer.Type: ApplicationFiled: December 3, 2004Publication date: December 15, 2005Inventors: Thibaut Maurice, Eric Guiot
-
Patent number: 6936523Abstract: The present invention relates to a method for manufacturing a heterogeneous material structure. The method includes forming a predetermined detachment area in a source substrate, and bonding the source substrate to a handle substrate to form a source-handle structure. The source-handle-structure is then annealed at a first energy level that is lower than the energy of a thermal detachment budget and stopping before detachment of the source substrate. Lastly, the source-handle-structure is annealed at a second energy level that is lower than the first energy level at least until the substrate detaches at the predetermined detachment area.Type: GrantFiled: December 10, 2003Date of Patent: August 30, 2005Assignees: S.O.I.Tec Silicon on Insulator Technologies S.A., Commisariat à l'énergie Atomique (CEA)Inventors: Cecile Berne, Bruno Ghyselen, Chrystelle Lagahe, Thibaut Maurice
-
Patent number: 6908828Abstract: Processes that may be used in producing electronic, optoelectronic, or optical components may be provided. The processes may involve preparing a reusable donor wafer for donating a thin layer of semiconductor material by assembling a donor layer of a semiconductor material having a thickness of plural thin layers onto a support layer of. The semiconductor material for the support layer may be selected to be less precious or to have a lower quality than the donor layer. The support layer may have sufficient mechanical characteristics for supporting the donor layer during desired semiconductor processing treatments.Type: GrantFiled: July 12, 2004Date of Patent: June 21, 2005Assignee: S.O.I. TEC Silicon on Insulator Technologies S.A.Inventors: Fabrice Letertre, Thibaut Maurice
-
Publication number: 20050130393Abstract: A method for improving the quality of a heterostructure that includes at least two layers of material that have different thermal expansion coefficients is described. The method includes applying a cap layer to the exposed surface of at least one of the layers. The cap layer is made of a material and has a thickness sufficient to reduce defects in at least one of the two layers during subsequent thermal treatment of the heterostructure. The present technique is a reliable and effective method for improving the quality of a heterostructure.Type: ApplicationFiled: May 5, 2004Publication date: June 16, 2005Inventors: Beryl Blondeau, Ian Cayrefourcq, Eric Guiot, Thibaut Maurice, Hubert Moriceau
-
Patent number: 6838358Abstract: The present invention relates to a method of manufacturing a wafer in which a heterogeneous material compound is detached at a pre-determined detachment area of the compound, and the compound is subject to a thermal treatment. It is the object of the present invention to provide an easy and effective method of detachment a heterogeneous material compound with a reduced risk of an undefined breaking of the compound. The object is solved by a method wherein the thermal treatment includes annealing the compound, where the annealing is stopped before a detachment of the compound, and an irradiation of the compound with photons in order to obtain a detachment of the compound at the pre-determined detachment area.Type: GrantFiled: November 18, 2003Date of Patent: January 4, 2005Assignee: S.O.I.TEC Silicon on Insulator Technologies S.A.Inventors: Thibaut Maurice, Ian Cayrefourcq, Franck Fournel
-
Publication number: 20040241960Abstract: The present invention relates to a method of manufacturing a wafer in which a heterogeneous material compound is detached at a pre-determined detachment area of the compound, and the compound is subject to a thermal treatment. It is the object of the present invention to provide an easy and effective method of detachment a heterogeneous material compound with a reduced risk of an undefined breaking of the compound. The object is solved by a method wherein the thermal treatment includes annealing the compound, where the annealing is stopped before a detachment of the compound, and an irradiation of the compound with photons in order to obtain a detachment of the compound at the pre-determined detachment area.Type: ApplicationFiled: November 18, 2003Publication date: December 2, 2004Inventors: Thibaut Maurice, Ian Cayrefourcq, Franck Fournel
-
Publication number: 20040241461Abstract: The present invention relates to the preparation of a wafer that has front and back surfaces that are suitable for use in optical, electronic, opto electronic or micro mechanical devices. The wafer preparation method includes the improvement which comprises applying a cap layer proximate to at least a portion of the back surface of the wafer to facilitate handling of the wafer while protecting at least the back surface portion from damage. Advantageously, the cap layer can be applied proximate to the entire back surface of the wafer and along at least a portion of a side of the wafer that extends between the surfaces to fully protect the back surface of the wafer from damage during handling. In another embodiment, the method further comprises applying a top layer proximate to at least a portion of the front surface of the wafer.Type: ApplicationFiled: November 18, 2003Publication date: December 2, 2004Inventors: Thibaut Maurice, Beryl Blondeau
-
Publication number: 20040241959Abstract: Processes that may be used in producing electronic, optoelectronic, or optical components may be provided. The processes may involve preparing a reusable donor wafer for donating a thin layer of semiconductor material by assembling a donor layer of a semiconductor material having a thickness of plural thin layers onto a support layer of The semiconductor material for the support layer may be selected to be less precious or to have a lower quality than the donor layer. The support layer may have sufficient mechanical characteristics for supporting the donor layer during desired semiconductor processing treatments.Type: ApplicationFiled: July 12, 2004Publication date: December 2, 2004Applicant: S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES S.A.Inventors: Fabrice Letertre, Thibaut Maurice
-
Patent number: 6815309Abstract: Processes that may be used in producing electronic, opotoelectronic, or optical components may be provided. The processes may involve preparing a reusable donor wafer for donating a thin layer of semiconductor material by assembling a donor layer of a semiconductor material having a thickness of plural thin layers onto a support layer of. The semiconductor material for the support layer may be selected to be less precious or to have a lower quality than the donor layer. The support layer may have sufficient mechanical characteristics for supporting the donor layer during desired semiconductor processing treatments.Type: GrantFiled: December 23, 2002Date of Patent: November 9, 2004Assignee: S.O.I.TEC Silicon on Insulator Technologies S.A.Inventors: Fabrice Letertre, Thibaut Maurice
-
Publication number: 20040161904Abstract: The present invention relates to a method for manufacturing a heterogeneous material structure. The method includes forming a predetermined detachment area in a source substrate, and bonding the source substrate to a handle substrate to form a source-handle structure. The source-handle-structure is then annealed at a first energy level that is lower than the energy of a thermal detachment budget and stopping before detachment of the source substrate. Lastly, the source-handle-structure is annealed at a second energy level that is lower than the first energy level at least until the substrate detaches at the predetermined detachment area.Type: ApplicationFiled: December 10, 2003Publication date: August 19, 2004Applicant: SOITEC & CEAInventors: Cecile Berne, Bruno Ghyselen, Chrystelle Lagahe, Thibaut Maurice
-
Publication number: 20040112866Abstract: The present invention relates to a method for recycling a substrate that has a residue on its surface and a detachment profile resulting from an implantation process. The method includes removing the residue from the substrate to a level substantially equivalent to that of the detachment profile, thus obtaining a substantially uniform planar surface on the substrate, and then polishing the entire surface of the substrate to eliminate defects.Type: ApplicationFiled: December 3, 2003Publication date: June 17, 2004Inventors: Christophe Maleville, Fabrice Letertre, Thibaut Maurice, Carlos Mazure, Frederic Metral
-
Publication number: 20030153163Abstract: Processes that may be used in producing electronic, opotoelectronic, or optical components may be provided. The processes may involve preparing a reusable donor wafer for donating a thin layer of semiconductor material by assembling a donor layer of a semiconductor material having a thickness of plural thin layers onto a support layer of. The semiconductor material for the support layer may be selected to be less precious or to have a lower quality than the donor layer. The support layer may have sufficient mechanical characteristics for supporting the donor layer during desired semiconductor processing treatments.Type: ApplicationFiled: December 23, 2002Publication date: August 14, 2003Inventors: Fabrice Letertre, Thibaut Maurice