Patents by Inventor Thierry Collange

Thierry Collange has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Bidirectional data exchange circuit
    Patent number: 9356597
    Abstract: A bidirectional data exchange circuit (10) includes a buffer (16) having paired terminals (A1 . . . A8, B1 . . . B8), a transfer direction input (20), an input (42) for controlling the transfer direction, and a logic gate (50). In the logic gate (50), the output is connected to the transfer direction input (20), an input is connected to the input (42) for controlling the transfer direction, this input being further connected to a first reference potential (Vcc) through a resistor (52), and the other input is connected to a terminal (A1) of the buffer (16) and to the first reference potential (Vcc) through a resistor (54; 154), and the terminal (B1) of the buffer (16), matched with the terminal (A1) of the buffer to which is connected the other input of the logic gate (50) being connected to a second reference potential through a resistor (56).
    Type: Grant
    Filed: December 17, 2013
    Date of Patent: May 31, 2016
    Assignee: THALES
    Inventors: Laurent Pubert, Jerome Pichet, Benjamin Grimonprez, Thierry Collange
  • BIDIRECTIONAL DATA EXCHANGE CIRCUIT
    Publication number: 20140184269
    Abstract: A bidirectional data exchange circuit (10) includes a buffer (16) having paired terminals (A1 . . . A8, B1 . . . B8), a transfer direction input (20), an input (42) for controlling the transfer direction, and a logic gate (50). In the logic gate (50), the output is connected to the transfer direction input (20), an input is connected to the input (42) for controlling the transfer direction, this input being further connected to a first reference potential (Vcc) through a resistor (52), and the other input is connected to a terminal (A1) of the buffer (16) and to the first reference potential (Vcc) through a resistor (54; 154), and the terminal (B1) of the buffer (16), matched with the terminal (A1) of the buffer to which is connected the other input of the logic gate (50) being connected to a second reference potential through a resistor (56).
    Type: Application
    Filed: December 17, 2013
    Publication date: July 3, 2014
    Applicant: THALES
    Inventors: LAURENT PUBERT, Jerome Pichet, Benjamin Grimonprez, Thierry Collange