Abstract: The disclosure relates to a communications system having a transmitter and receiver connected via a transmission line. An example communications receiver (202) comprises: a pair of input connections (211, 212) for connecting to a transmission line (203); a termination resistance (213) equal to a characteristic impedance (Zc) of the transmission line (203); an air core transformer (205) having an input coil (206) connected to the pair of input connections (211, 212) via the termination resistance (213); and a comparator circuit (208) connected to an output coil (207) of the air core transformer (205), the comparator circuit (208) configured to provide an output signal (504) responsive to detection of voltage pulses across the output coil (207). [FIG.

Abstract: The disclosure relates to a communications system having a transmitter and receiver connected via a transmission line. An example communications receiver (202) comprises: a pair of input connections (211, 212) for connecting to a transmission line (203); a termination resistance (213) equal to a characteristic impedance (Zc) of the transmission line (203); an air core transformer (205) having an input coil (206) connected to the pair of input connections (211, 212) via the termination resistance (213); and a comparator circuit (208) connected to an output coil (207) of the air core transformer (205), the comparator circuit (208) configured to provide an output signal (504) responsive to detection of voltage pulses across the output coil (207).

Abstract: An apparatus for determining temperature comprising: a PTAT circuit configured to provide a PTAT voltage proportional to absolute temperature; a bandgap voltage reference circuit configured to generate a voltage across a sense-resistor wherein a reference voltage is provided between a first terminal and a second terminal which couple to the sense-resistor; a calibration circuit, comprising: a memory to store a predetermined calibration value; a trim circuit to receive a trim value based on the predetermined calibration value to control where one or both of the first and second terminals couple to the sense-resistor for provision of the reference voltage; a dynamic calibration module configured to, based on a change in the PTAT voltage, generate the trim value by adding or subtracting a predetermined number of bits from the predetermined calibration value; wherein the apparatus provides a signal indicative of temperature based on the PTAT voltage and the reference voltage.

Abstract: A bandgap reference circuit includes a first current generator having first and second bipolar transistors for generating a first current that varies proportionally as a function of temperature. A second current generator includes a field effect transistor for generating a second current that varies inversely as a function of temperature. A trimming circuit includes a third bipolar transistor sized to match the first bipolar transistor, a third current generator having a second field effect transistor coupled to a collector and base of the third bipolar transistor to generate a third current based on a base current of the third bipolar transistor, and a trim control circuit configured to modify the second current by adding the third current to or subtracting the third current from the second current based on a trim control signal. A bandgap reference current is generated by summing the first current and the modified second current.

Abstract: The disclosure relates to a bandgap reference voltage circuit, in which an output reference voltage is stable with respect to temperature and other variations. Example embodiments include a bandgap reference voltage circuit comprising an output voltage circuit and a plurality, n, of offset amplifiers connected between first and second voltage rails, each of the plurality of offset amplifiers comprising a differential pair of transistors that together define an offset between an input voltage at an input and an output of the amplifier, the offset amplifiers being chained together and connected to the output voltage circuit that provides a bandgap reference voltage dependent on a sum of the offsets of the plurality of offset amplifiers.

Abstract: A bandgap voltage reference circuit comprises a plurality of delta base-emitter voltage (?Vbe) cells extending between first and second voltage rails in a serial arrangement. Each ?Vbe cell includes a transistor comprising a single first emitter connection and eight second emitter connections. The single first emitter connection of a second transistor in the serial arrangement is coupled to one of the eight second emitter connections of a first transistor in the serial arrangement, and one of the eight second emitter connections of the second transistor is coupled to the single first emitter connection of a third transistor in the serial arrangement to form an electrical path from the first transistor to the third transistor. A resistor is at a distal end of the serial arrangement. An output voltage across the resistor includes a sum of delta base-emitter voltages generated by the plurality of ?Vbe cells.

Abstract: A current reference circuit, comprises a main resistor, comprising: a first force contact terminal at a first end of the main resistor and coupled to a first metal-oxide-semiconductor (MOS) component; a second force contact terminal at a second end of the main resistor and coupled to a second MOS component; a first sense contact terminal coupled to one bipolar junction transistor (BJT); and a second sense contact terminal opposite the first sense contact by a length of the main resistor and coupled to another bipolar junction transistor, wherein the first and second sense contact terminals exchange a current reference independently of the first and second force contact terminals.

Abstract: An apparatus includes a first transistor including a first gate, a first drain and a first source. A second transistor includes a second gate and a second source, the second gate is coupled to a first current source configured to generate a linear current ramp, the second source is coupled to the first gate and a second current source configured to generate a constant current through the second transistor determined by a sampled voltage between the first gate and the first source. A third transistor includes a third gate and a third source, the third gate is coupled to the first drain, and the third source is coupled to an inductive load, wherein the third transistor is configured to source a load current to the inductive load in response to an integration of the linear current ramp. A first capacitor is coupled between the third source and the second gate.

Abstract: The disclosure relates to a communications system having a transmitter and receiver connected via a transmission line. An example communications receiver (202) comprises: a pair of input connections (211, 212) for connecting to a transmission line (203); a termination resistance (213) equal to a characteristic impedance (Zc) of the transmission line (203); an air core transformer (205) having an input coil (206) connected to the pair of input connections (211, 212) via the termination resistance (213); and a comparator circuit (208) connected to an output coil (207) of the air core transformer (205), the comparator circuit (208) configured to provide an output signal (504) responsive to detection of voltage pulses across the output coil (207).

Abstract: The disclosure relates to a bandgap reference voltage circuit, in which an output reference voltage is stable with respect to temperature and other variations. Example embodiments include a bandgap reference voltage circuit comprising an output voltage circuit and a plurality, n, of offset amplifiers connected between first and second voltage rails, each of the plurality of offset amplifiers comprising a differential pair of transistors that together define an offset between an input voltage at an input and an output of the amplifier, the offset amplifiers being chained together and connected to the output voltage circuit that provides a bandgap reference voltage dependent on a sum of the offsets of the plurality of offset amplifiers.

Abstract: A voltage reference circuit including a resistive track having a first force contact and a second force contact. The first and second force contacts configured to pass a current through the resistive track. A first sense contact, a second sense contact and a third sense contact are arranged at different positions along the resistive track between the first and second force contacts and the sense contacts are arranged to define a first resistor and a second resistor. A first component arrangement includes a P-N junction which has a temperature dependent voltage bias; a second component arrangement. One or both of the first component arrangement and the second component arrangement provide for a counter-bias voltage. The counter bias voltage counters the temperature dependent voltage bias of the P-N junction such that the voltage reference circuit provides a constant output reference voltage.

Abstract: A voltage reference circuit comprising: a resistive track having a first force contact and a second force contact, the first and second force contacts configured to pass a current through the resistive track; a first sense contact, a second sense contact and a third sense contact wherein each of the sense contacts are arranged at different positions along the resistive track between the first and second force contacts and the sense contacts arranged to define a first resistor and a second resistor; a first component arrangement comprising a P-N junction which has a temperature dependent voltage bias; a second component arrangement; wherein one or both of the first component arrangement and the second component arrangement provide for a counter-bias voltage, the counter bias voltage for countering the temperature dependent voltage bias of the P-N junction such that the voltage reference circuit is configured to provide a constant output reference voltage.

Abstract: The present application relates to a sub-bandgap reference source circuit, which comprises a current mirror source, a first branch comprising a first BJT and a second branch comprising a second BJT, the first BJT having an emitter current density lower than an emitter current density of the second BJT, the first branch and the second branch being connected at a first node coupled to ground; a first voltage divider comprising first and second resistances coupled in series, the first resistance being coupled between a base terminal of the first BJT and a second node, the second resistor being coupled to ground; a second voltage divider comprising first and second resistances coupled in series, the first resistance being coupled between the second node and a base terminal of the second BJT, the second resistance being coupled to the first node; and an output terminal coupled to the second node.

Abstract: The present application relates to a sub-bandgap reference source circuit, which comprises a current mirror source, a first branch comprising a first BJT and a second branch comprising a second BJT, the first BJT having an emitter current density lower than an emitter current density of the second BJT, the first branch and the second branch being connected at a first node coupled to ground; a first voltage divider comprising first and second resistances coupled in series, the first resistance being coupled between a base terminal of the first BJT and a second node, the second resistor being coupled to ground; a second voltage divider comprising first and second resistances coupled in series, the first resistance being coupled between the second node and a base terminal of the second BJT, the second resistance being coupled to the first node; and an output terminal coupled to the second node.

Abstract: A transistor circuit includes a transistor having a control electrode, a first current electrode, and a second current electrode. A turn off mode change circuit has a signal input that receives a series of pulses, an output coupled to the control electrode of the transistor, and a control input. The turn off mode change circuit has a fast turn off mode and a slow turn off mode. A turn off mode detection circuit is coupled between the first current electrode and the second current electrode. The turn off mode change circuit detects when a transition from the fast turn off mode to the slow turn off mode is desired and when a transition from the slow turn off mode to the fast transition mode may be performed.

Abstract: A transistor circuit includes a transistor having a control electrode, a first current electrode, and a second current electrode. A turn off mode change circuit has a signal input that receives a series of pulses, an output coupled to the control electrode of the transistor, and a control input. The turn off mode change circuit has a fast turn off mode and a slow turn off mode. A turn off mode detection circuit is coupled between the first current electrode and the second current electrode. The turn off mode change circuit detects when a transition from the fast turn off mode to the slow turn off mode is desired and when a transition from the slow turn off mode to the fast transition mode may be performed.