Patents by Inventor Thierry Mourier

Thierry Mourier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9224796
    Abstract: A device includes a substrate and an integrated-circuit interconnect on a first side. A capacitor passes through the substrate possessing a first electrode having a first contact face electrically coupled to a first electrically conductive zone placed on a second side of the substrate and a second electrode electrically coupled to the interconnect. A through-silicon via passes through the substrate having at one end a first contact face electrically coupled to a second electrically conductive zone placed on said second side of the substrate and at the other end a part electrically coupled to the interconnect part. The two first contact faces are located in the same plane.
    Type: Grant
    Filed: June 17, 2014
    Date of Patent: December 29, 2015
    Assignees: STMicroelectronics (Crolles 2) SAS, Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Jean-Philippe Colonna, Sylvain Joblot, Thierry Mourier, Olivier Guiller
  • Publication number: 20140367828
    Abstract: A device includes a substrate and an integrated-circuit interconnect on a first side. A capacitor passes through the substrate possessing a first electrode having a first contact face electrically coupled to a first electrically conductive zone placed on a second side of the substrate and a second electrode electrically coupled to the interconnect. A through-silicon via passes through the substrate having at one end a first contact face electrically coupled to a second electrically conductive zone placed on said second side of the substrate and at the other end a part electrically coupled to the interconnect part. The two first contact faces are located in the same plane.
    Type: Application
    Filed: June 17, 2014
    Publication date: December 18, 2014
    Applicants: STMicroelectronics (Crolles 2) SAS, Commissariat a L'Energie Atomique et aux Energies Alternatives
    Inventors: Jean-Philippe Colonna, Sylvain Joblot, Thierry Mourier, Olivier Guiller
  • Publication number: 20060211236
    Abstract: The present invention relates to a process for coating a surface of a substrate with a seed film of a metallic material, the said surface being an electrically conductive or semiconductive surface and having recesses and/or projections. The process comprises the following: an organic film is placed on the said surface, the said film having a thickness such that the free face of this film conformally follows the recesses and/or projections of the said electrically conductive or semiconductive surface on which it is placed; a precursor of the metallic material is inserted within the said organic film placed on the said surface at the same time as, or after, the step consisting in placing the said organic film on the said surface; and the said precursor of the metallic material inserted within the said organic film is converted into the said metallic material. This process allows integrated circuits, interconnects in microelectronics and microsystems to be fabricated.
    Type: Application
    Filed: February 13, 2004
    Publication date: September 21, 2006
    Applicant: ALCHIMER S.A. 15, rue du Buisson aux Fraises- ZI
    Inventors: Christophe Bureau, Paul-Henri Haumesser, Sylvain Maitrejean, Thierry Mourier