Patents by Inventor Thirupurasundari Jayaraman

Thirupurasundari Jayaraman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220270212
    Abstract: A system and method for enhancing image quality. The system and method acquire a machine learning model trained for correlating one or more training images and one or more training design images. The system and method receive one or more sample specimen images corresponding to one or more features of a sample specimen. The system and method enhance the one or more sample specimen images by generating one or more enhanced images with the machine learning model based on at least the one or more sample specimen images.
    Type: Application
    Filed: February 16, 2022
    Publication date: August 25, 2022
    Inventors: Kaushik Sah, Thirupurasundari Jayaraman, Srikanth Kandukuri, Andrew James Cross, Gangadharan Sivaraman
  • Patent number: 10620134
    Abstract: Methods and systems for creating a sample of defects for a specimen are provided. One method includes detecting defects on a specimen based on output generated by a detector of an output acquisition subsystem. For the defects detected in an array region on the specimen, where the array region includes multiple array cell types, the method includes stacking information for the defects based on the multiple array cell types. The stacking includes overlaying design information for only a first of the multiple array cell types with the information for only the defects detected in the first of the multiple array cell types. In addition, the method includes selecting a portion of the detected defects based on results of the stacking thereby creating a sample of the detected defects.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: April 14, 2020
    Assignee: KLA-Tencor Corp.
    Inventors: Vidyasagar Anantha, Manikandan Mariyappan, Raghav Babulnath, Gangadharan Sivaraman, Satya Kurada, Thirupurasundari Jayaraman, Prasanti Uppaluri, Srikanth Kandukuri
  • Publication number: 20190346375
    Abstract: Methods and systems for creating a sample of defects for a specimen are provided. One method includes detecting defects on a specimen based on output generated by a detector of an output acquisition subsystem. For the defects detected in an array region on the specimen, where the array region includes multiple array cell types, the method includes stacking information for the defects based on the multiple array cell types. The stacking includes overlaying design information for only a first of the multiple array cell types with the information for only the defects detected in the first of the multiple array cell types. In addition, the method includes selecting a portion of the detected defects based on results of the stacking thereby creating a sample of the detected defects.
    Type: Application
    Filed: July 26, 2018
    Publication date: November 14, 2019
    Inventors: Vidyasagar Anantha, Manikandan Mariyappan, Raghav Babulnath, Gangadharan Sivaraman, Satya Kurada, Thirupurasundari Jayaraman, Prasanti Uppaluri, Srikanth Kandukuri
  • Patent number: 10387601
    Abstract: Systems and methods are disclosed for storing dynamic layer content in a design file. A design file is received having design data corresponding to a plurality of process layers. A geometric operation formula is also received. A processor generates a polygon having dynamic layer content that is formed by applying the geometric operation formula on two or more of the plurality of process layers. The updated design file is stored, the design file now having a polygon having dynamic layer content.
    Type: Grant
    Filed: November 22, 2016
    Date of Patent: August 20, 2019
    Assignee: KLA-Tencor Corporation
    Inventors: Thirupurasundari Jayaraman, Srikanth Kandukuri, Gordon Rouse, Anil Raman, Kenong Wu, Praveen Gunasekaran, Aravindh Balaji, Ankit Jain
  • Patent number: 10209628
    Abstract: A method for automatically classifying one or more defects based on electrical design properties includes receiving one or more images of a selected region of a sample, receiving one or more sets of design data associated with the selected region of the sample, locating one or more defects in the one or more images of the selected region of the sample by comparing the one or more images of the selected region of the sample to the one or more sets of design data, retrieving one or more patterns of interest from the one or more sets of design data corresponding to the one or more defects, and classifying the one or more defects in the one or more images of the selected region of the sample based on one or more annotated electrical design properties included in the one or more patterns of interest.
    Type: Grant
    Filed: October 4, 2016
    Date of Patent: February 19, 2019
    Assignee: KLA-Tencor Corporation
    Inventors: Prasanti Uppaluri, Thirupurasundari Jayaraman, Ardis Liang, Srikanth Kandukuri, Sagar Kekare
  • Patent number: 10204416
    Abstract: Deskew for image review, such as SEM review, aligns inspection and review coordinate systems. Deskew can be automated using design files or inspection images. A controller that communicates with a review tool can align a file of the wafer, such as a design file or an inspection image, to an image of the wafer from the review tool; compare alignment sites of the file to alignment sites of the image from the review tool; and generate a deskew transform of coordinates of the alignment sites of the file and coordinates of alignment sites of the image from the review tool. The image of the wafer may not contain defects.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: February 12, 2019
    Assignee: KLA-Tencor Corporation
    Inventors: Arpit Jain, Arpit Yati, Thirupurasundari Jayaraman, Raghavan Konuru, Raj Kuppa, Hema Prasad, Saiyashwanth Momula, Arun Lobo
  • Patent number: 9996942
    Abstract: Methods and systems for determining a position of output generated by an inspection subsystem in design data space are provided. In general, some embodiments described herein are configured for substantially accurately aligning inspection subsystem output generated for a specimen to a design for the specimen despite deformation of the design in the inspection subsystem output. In addition, some embodiments are configured for generating and/or using alignment targets that can be shared across multiple specimens of the same layer and design rule for alignment of inspection subsystem output generated for a specimen to a design for the specimen.
    Type: Grant
    Filed: March 17, 2016
    Date of Patent: June 12, 2018
    Assignee: KLA-Tencor Corp.
    Inventors: Santosh Bhattacharyya, Pavan Kumar, Lisheng Gao, Thirupurasundari Jayaraman, Raghav Babulnath, Srikanth Kandukuri, Gangadharan Sivaraman, Karthikeyan Subramanian, Raghavan Konuru, Rahul Lakhawat
  • Patent number: 9865512
    Abstract: Methods and systems for dynamic design attributes for wafer inspection are provided. One method includes, at run time of a wafer inspection recipe, prompting a user of a wafer inspection tool on which the wafer inspection recipe is performed for information for a design based binning (DBB) process. The information includes one or more formulae for calculating design attributes from a design for a wafer. The design attributes are used to bin the defects in the DBB process. The method also includes performing inspection of a wafer according to an updated wafer inspection recipe. Performing the inspection includes binning defects detected on the wafer according to the DBB process in the updated wafer inspection recipe.
    Type: Grant
    Filed: April 3, 2014
    Date of Patent: January 9, 2018
    Assignee: KLA-Tencor Corp.
    Inventors: Thirupurasundari Jayaraman, Raghav Babulnath
  • Publication number: 20170344695
    Abstract: A method for automatically classifying one or more defects based on electrical design properties includes receiving one or more images of a selected region of a sample, receiving one or more sets of design data associated with the selected region of the sample, locating one or more defects in the one or more images of the selected region of the sample by comparing the one or more images of the selected region of the sample to the one or more sets of design data, retrieving one or more patterns of interest from the one or more sets of design data corresponding to the one or more defects, and classifying the one or more defects in the one or more images of the selected region of the sample based on one or more annotated electrical design properties included in the one or more patterns of interest.
    Type: Application
    Filed: October 4, 2016
    Publication date: November 30, 2017
    Inventors: Prasanti Uppaluri, Thirupurasundari Jayaraman, Ardis Liang, Srikanth Kandukuri, Sagar Kekare
  • Publication number: 20170228866
    Abstract: Deskew for image review, such as SEM review, aligns inspection and review coordinate systems. Deskew can be automated using design files or inspection images. A controller that communicates with a review tool can align a file of the wafer, such as a design file or an inspection image, to an image of the wafer from the review tool; compare alignment sites of the file to alignment sites of the image from the review tool; and generate a deskew transform of coordinates of the alignment sites of the file and coordinates of alignment sites of the image from the review tool. The image of the wafer may not contain defects.
    Type: Application
    Filed: September 7, 2016
    Publication date: August 10, 2017
    Inventors: Arpit Jain, Arpit Yati, Thirupurasundari Jayaraman, Raghavan Konuru, Raj Kuppa, Hema Prasad, Saiyashwanth Momula, Arun Lobo
  • Publication number: 20170154147
    Abstract: Systems and methods are disclosed for storing dynamic layer content in a design file. A design file is received having design data corresponding to a plurality of process layers. A geometric operation formula is also received. A processor generates a polygon having dynamic layer content that is formed by applying the geometric operation formula on two or more of the plurality of process layers. The updated design file is stored, the design file now having a polygon having dynamic layer content.
    Type: Application
    Filed: November 22, 2016
    Publication date: June 1, 2017
    Inventors: Thirupurasundari Jayaraman, Srikanth Kandukuri, Gordon Rouse, Anil Raman, Kenong Wu, Praveen Gunasekaran, Aravindh Balaji
  • Publication number: 20160275672
    Abstract: Methods and systems for determining a position of output generated by an inspection subsystem in design data space are provided. In general, some embodiments described herein are configured for substantially accurately aligning inspection subsystem output generated for a specimen to a design for the specimen despite deformation of the design in the inspection subsystem output. In addition, some embodiments are configured for generating and/or using alignment targets that can be shared across multiple specimens of the same layer and design rule for alignment of inspection subsystem output generated for a specimen to a design for the specimen.
    Type: Application
    Filed: March 17, 2016
    Publication date: September 22, 2016
    Inventors: Santosh Bhattacharyya, Pavan Kumar, Lisheng Gao, Thirupurasundari Jayaraman, Raghav Babulnath, Srikanth Kandukuri, Gangadharan Sivaraman, Karthikeyan Subramanian, Raghavan Konuru, Rahul Lakhawat
  • Publication number: 20140303921
    Abstract: Methods and systems for dynamic design attributes for wafer inspection are provided. One method includes, at run time of a wafer inspection recipe, prompting a user of a wafer inspection tool on which the wafer inspection recipe is performed for information for a design based binning (DBB) process. The information includes one or more formulae for calculating design attributes from a design for a wafer. The design attributes are used to bin the defects in the DBB process. The method also includes performing inspection of a wafer according to an updated wafer inspection recipe. Performing the inspection includes binning defects detected on the wafer according to the DBB process in the updated wafer inspection recipe.
    Type: Application
    Filed: April 3, 2014
    Publication date: October 9, 2014
    Applicant: KLA-Tencor Corporation
    Inventors: Thirupurasundari Jayaraman, Raghav Babulnath