Abstract: A garment hanger for washing, drying and storing garments including a hanger body having a neck supporting portion and shoulder supporting portions extending outwardly from opposite sides of the neck supporting portion. The shoulder supporting portions have a width separating the opposite sides of the garment by an amount which will distend the same in an open condition at its lower end. A hook structure is coupled to the hanger body and formed for hanging of the hanger from a support device. The neck supporting portion extends upwardly from the shoulder supporting portions to hold the garment neck in an open condition. The neck opening or channel is substantially unobstructed and of a sufficient size for washing of the interior of the garment and to allow convection air flow through the neck portion while drying the garment. A process of convection flow drying of the garment also is disclosed.

Abstract: A symmetric multiprocessing fault-tolerant computer system controls memory access in a symmetric multiprocessing computer system. To do so, virtual page structures are created, where the virtual page structures reflect physical page access privileges to shared memory for processors in a symmetric multiprocessing computer system. Access to shared memory is controlled based on physical page access privileges reflected in the virtual paging structures to coordinate deterministic shared memory access between processors in the symmetric multiprocessing computer system. A symmetric multiprocessing fault-tolerant computer system may use duplication or continuous replay.

Abstract: A fault tolerant/fault resilient computer system includes a first coserver and a second coserver. The first coserver includes a first application environment (AE) processor and a first I/O subsystem processor on a first common motherboard. The second coserver includes a second AE processor and a second I/O subsystem processor on a second common motherboard. Each of the AE processors has a clock that operates asynchronously to clocks of the other AE processor, and the AE processors operate in instruction lockstep.