Abstract: A wired pipe assembly includes a first wired pipe segment including a first body extending from a first box end to a first pin end and a second wired pipe segment including a second body extending from a second box end to a second pin end. The assembly also includes an electromagnetic directional coupler including an input line disposed in the first wired pipe segment and an output line disposed in the second wired pipe segment.

Abstract: A wired pipe assembly includes a first wired pipe segment including a first body extending from a first box end to a first pin end and a second wired pipe segment including a second body extending from a second box end to a second pin end. The assembly also includes an electromagnetic directional coupler including an input line disposed in the first wired pipe segment and an output line disposed in the second wired pipe segment.

Abstract: A method and apparatus generates a clock frequency dependent on a reference clock signal and has a phase locked loop configuration. A multiplexer is connected into the transmission path of the respective incoming input signal, to which the corresponding input signal is fed directly, on the one hand, and in delayed fashion, on the other hand. The common clock signal used is a system clock signal, independent of the reference clock signal and the local clock signal and whose frequency is higher by a factor of at least “5” than the frequency of the reference clock signal and of the local clock signal, respectively. The temporal spacing between the edges of the undelayed clock signal, and of the delayed clock signal, is set such that it is greater than the temporal spacing of the sampling pulses of the phase detector that are predetermined by the system clock signal.

Abstract: A method and apparatus generates a clock frequency dependent on a reference clock signal and has a phase locked loop configuration. A multiplexer is connected into the transmission path of the respective incoming input signal, to which the corresponding input signal is fed directly, on the one hand, and in delayed fashion, on the other hand. The common clock signal used is a system clock signal, independent of the reference clock signal and the local clock signal and whose frequency is higher by a factor of at least “5” than the frequency of the reference clock signal and of the local clock signal, respectively. The temporal spacing between the edges of the undelayed clock signal, and of the delayed clock signal, is set such that it is greater than the temporal spacing of the sampling pulses of the phase detector that are predetermined by the system clock signal.

Abstract: A circuit arrangement for generating charge pulses during digital telecommunications is indicated, whereby subscribers (Tln) of a telephone network are connected by cables with an exchange. The subscriber telephones are connected by electric service lines to an interface unit that is connected to the exchange. The interface unit has a digital interface on the exchange side and at least one analog interface on the subscriber side. A generating circuit (3) is located in the interface unit and produces charge pulses as a function of signals transmitted by the exchange, the charge pulses being transmitted to the respective subscriber (Tln). When loop current flows through the electric circuit of each subscriber (Tln) telephone, the interface unit measures an input voltage that is proportional to the length of the service line. The thus gained voltage value is used to adjust the voltage level of the charge pulses produced by the generating circuit (3).